82P33831

Features

• SMU allows any IEEE 1588 software, running on an external processor, to control the generation of electrical clocks, and to access and control physical layer synchronization
• Supports Telecom Boundary Clock (T-BC) and Telecom Time Slave Clock (T-TSC) applications per G.8273.2 with physical layer frequency support to the DCOs
• Physical layer clocks comply with ITU-T G.8262 for Synchronous Ethernet Equipment Clock (EEC), and G.813 for Synchronous Equipment Clock (SEC), and Telcordia GR-253-CORE for Stratum 3 and SONET Minimum Clock (SMC)
• System-wide precise 1PPS (Pulse Per Second) edge alignment is supported with programmable input-to-input, input-to-output and output-to-output phase delays: sub-ns resolution
• 24 hour time holdover is supported by DCOs with fine frequency resolution (1.7e-16)
• Generates clocks for: 10GBASE-R, 10GBASE-W, 40GBASE-R and CPRI/OBSAI interfaces without external jitter attenuators: jitter generation <0.3 ps RMS (10 kHz to 20 MHz)
• Generates clocks for: Ethernet, SONET/SDH and PDH interfaces: jitter generation <1 ps RMS (12 kHz to 20 MHz)
• IEEE 1588 grand master applications are supported by locking to 1 PPS (Pulse Per Second) references from GPS or other GNSS sources
• Eases local oscillator sourcing by supporting any of eight common TCXO/OCXO frequencies for the System Clock: 10 MHz, 12.8 MHz, 13 MHz, 19.44 MHz, 20 MHz, 24.576 MHz, 25 MHz or 30.72 MHz
• Automatically loads configuration from an external EPROM after reset without processor intervention
• 144 pin CABGA package
• Supported by Timing Commander Software

Comparison

Applications