Overview
Description
The 8V41N012A is a PLL-based clock generator specifically designed for Cavium Networks Octeon II processors. This high performance device is optimized to generate the processor core reference clock, the PCI-Express, sRIO, XAUI, SerDes reference clocks and the clocks for both the Gigabit Ethernet MAC and PHY. The output frequencies are generated from a 25MHz external input source or an external 25MHz parallel resonant crystal. The industrial temperature range of the 8V41N012A supports telecommunication, networking, and storage requirements.
Features
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Ten selectable 100MHz, 125MHz, 156.25MHz and 312.5MHz clocks for PCI Express, sRIO and GbE, HCSL interface levels
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One single-ended QG LVCMOS/LVTTL clock output at 125MHz
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One single-ended QF LVCMOS/LVTTL clock output at 50MHz
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Two single-ended QREFx LVCMOS/LVTTL outputs at 25MHz
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Selectable external crystal or differential (single-ended) input source
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Crystal oscillator interface designed for 25MHz, parallel resonant crystal
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Differential CLK, nCLK input pair that can accept: LVPECL, LVDS, LVHSTL, HCSL input levels
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Internal resistor bias on nCLK pin allows the user to drive CLK input with external single-ended (LVCMOS/ LVTTL) input levels
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Supply Modes, (125MHz QG output and 25MHz QREFx outputs):
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Core / Output
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3.3V / 3.3V
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3.3V / 2.5V
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Supply Modes, (HCSL outputs, and 50MHz QF output):
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Core / Output
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3.3V / 3.3V
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-40°C to 85°C ambient operating temperature
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Lead-free (RoHS 6) packaging
Comparison
Applications
Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
![Diagram of ECAD Models](/themes/idt8/images/ecad-models.jpg)