Overview
Description
The 72200 is a 256 x 8 SyncFIFO™ with clocked read and write controls. This FIFO is useful for a wide variety of data buffering needs, such as graphics, Local Area Networks (LANs), and interprocessor communication. It has 8-bit input and output ports. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation.
Features
- 10 ns read/write cycle time
- Read and Write Clocks can be asynchronous or coincidental
- Dual-Ported zero fall-through time architecture
- Empty and Full flags signal FIFO status
- Almost-Empty and Almost-Full flags set to Empty+7 and Full-7, respectively
- Output enable puts output data bus in high-impedance state
- Available in 28-pin 300 mil plastic DIP
- Industrial temperature range (–40C to +85C) is available
Comparison
Applications
Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
Processing table
| PDIP | 28 | C | No | Tube | ||
| PDIP | 28 | C | Yes | Tube | ||
| PDIP | 28 | C | No | Tube | ||
| PDIP | 28 | C | No | Tube |
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