Renesas Electronics Corporation
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M1033

Obsolete

VCSO Based Clock PLL with Autoswitch Function

Overview

The M1033 is a Voltage Controlled SAW Oscillator (VCSO) based clock jitter attenuator PLL designed for clock jitter attenuation and frequency translation. The device is ideal for generating the transmit reference clock for optical network systems supporting up to 2.5Gb data rates. It can serve to jitter attenuate a stratum reference clock or a recovered clock in loop timing mode. The M1033 module includes a proprietary Surface Acoustic Wave (SAW) delay line as part of the VCSO. This results in a high-frequency, high-Q, low phase noise oscillator that assures low intrinsic output jitter.

  • Integrated SAW delay line
  • Low phase jitter of < 0.5ps RMS, typical (12kHz to 20MHz)
  • Output frequencies of 62.5MHz to 175MHz (Specify VCSO output frequency at time of order)
  • LVPECL clock output (CML and LVDS options available)
  • Reference clock inputs support differential LVDS, LVPECL, as well as single-ended LVCMOS, LVTTL
  • Loss of Reference (LOR) output pin
  • Narrow bandwidth control input (NBW pin)
  • AutoSwitch (AUTO pin) - Automatic (non-revertive) reference clock reselection upon clock failure
  • Acknowledge pin (REF_ACK pin) indicates the actively selected reference input
  • Phase Build-out only upon MUX reselection option (PBOM)
  • Pin-selectable feedback and reference divider ratios
  • Single 3.3V power supply
  • Small 9mm x 9mm surface mount package

Documentation
Type Title Date
End Of Life Notice
PDN# : Z-13-01 PRODUCT DISCONTINUANCE NOTICE
PDF 71 KB
1 item

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