Overview
Description
The RC19024 is a 24-output PCIe Gen7 buffer that is backward compatible with earlier PCIe generations. The RC19024 provides ultra-low additive jitter and reduced in-to-out delay performance for better design margin and incorporates several features for easier and more robust design.
Features
- LP-HCSL outputs eliminate up to 96 terminated resistors
- PCIe Gen 1–7 compliance
- Drive both source-terminated and double-terminated loads
- Selectable output slew rate via SMBus
- Supports 85Ω output impedance
- Open-drain LOS (Loss-Of-Signal) indication output
- Power down tolerance (PDT)
- Flexible startup sequencing (FSS)
- Automatic clock parking (ACP)
- Dedicated OE# pins to control group output
- 4-wire Side-Band interface and device daisy-chaining
- SMBus write protection features with 9 selectable addresses
- 8mm × 8mm 100-GQFN package
Comparison
Applications
Design & Development
Software & Tools
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
Videos & Training
PCIe Gen7 RC19 Family Clock Buffer and Multiplexer Overview
The RC family consists of PCIe Gen7 clock buffer and multiplexer solutions, providing the industry's smallest and most compact footprint.
Video List