Overview

The 72V221 is a 1K x 9 First-In, First-Out (FIFO) memory with clocked read and write controls. It is a 3.3V version of the 72221 device and is applicable for a wide variety of data buffering needs such as graphics, local area networks, and interprocessor communication. It has 9-bit input and output ports. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronously of one another for dual clock operation.

72V221 - Block Diagram
72V221 - Block Diagram
  • 10ns read/write cycle time
  • 5V input tolerant
  • Read and Write clocks can be independent
  • Dual-ported zero fall-through time architecture
  • Empty and Full flags signal FIFO status
  • Programmable Almost-Empty and Almost-Full flags can be set to any depth
  • Programmable Almost-Empty and Almost-Full flags default to Empty+7, and Full-7, respectively
  • Output Enable puts the output data bus in a high-impedance state
  • Available in 32-pin PLCC and TQFP packages
  • Industrial temperature range (–40 °C to +85 °C) is available

Documentation

Design & Development

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

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Diagram of ECAD Models

Product Options

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    Moisture Sensitivity Level (MSL)
    Buy / Sample
    Part Number
    72V221L15PFGI8
    circleActive
    memory
    view_in_ar
    		TQFP 32 I Yes Reel 3
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