Processing table
Series Name |
CPU |
Program Memory (KB) |
Data Flash (KB) |
SRAM |
Lead Count (#) |
Operating Voltage Range (V) |
Operating Freq (Max) (MHz) |
DAC |
I/O Ports |
CAN (ch) |
Safety |
Security & Encryption |
Family Name |
DMA |
Ethernet |
RTC |
LVD or PVD |
PLP |
Temp. Range |
|
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Part Number | ||||||||||||||||||||
| 32MHz Arm Cortex-M0+ CPU | S1 | M0+ | 64, 128 | 4 | 16 KB | 48, 64 | 1.6 - 5.5 | 32 | 12-bit x 1-ch | 35, 51 | 1 | Yes | 128-bit Unique ID, AES128, AES256, TRNG | Synergy MCU | No | No | No | Yes | 2031 Jun, 2036 Mar | -40 to +105°C |
| 32MHz Arm Cortex-M0+ CPU | S1 | M0+ | 256 | 4 | 24 KB | 32, 48, 64 | 1.6 - 5.5 | 32 | 8-bit x 3-ch | 24, 37, 53 | 1 | Yes | 128-bit Unique ID, AES128, AES256, TRNG | Synergy MCU | No | No | No | Yes | 2033 May, 2036 Mar | -40 to +105°C |
| 48MHz Arm Cortex-M23 CPU | S1 | M23 | 256 | 8 | 32 KB | 32, 36, 64 | 1.6 - 5.5 | 48 | 8-bit x 2-ch, 12-bit x 1-ch | 20, 22, 49 | 1 | Yes | 128-bit Unique ID, AES128, AES256, TRNG | Synergy MCU | No | No | No | Yes | 2033 Oct, 2036 Mar | -40 to +85°C, -40 to +105°C |
| 48MHz Arm Cortex-M4 CPU | S3, S5 | M4 | 1024 | 8 | 192 KB | 64, 100, 121, 144, 145 | 1.6 - 5.5 | 48 | 8-bit x 2-ch, 12-bit x 1-ch | 52, 84, 104, 126 | 1 | Yes | 128-bit Unique ID, AES128, AES256, GHASH, TRNG | Synergy MCU | No | No | No | No | 2030 Dec, 2033 May, 2036 Mar, 2037 Dec | -40 to +85°C, -40 to +105°C |
| 48MHz Arm Cortex-M4 CPU | S3 | M4 | 512 | 8 | 96 KB | 64, 100, 121, 144, 145 | 1.6 - 5.5 | 48 | 8-bit x 2-ch, 12-bit x 1-ch | 52, 84, 104, 126 | 1 | Yes | 128-bit Unique ID, AES128, AES256, GHASH, TRNG | Synergy MCU | No | No | No | No | 2030 Dec, 2033 May, 2036 Mar, 2037 Dec | -40 to +85°C, -40 to +105°C |
| 48MHz Arm Cortex-M4 CPU | S3 | M4 | 256 | 8 | 32 KB | 40, 48, 64, 100 | 1.6 - 5.5 | 48 | 8-bit x 2-ch, 12-bit x 1-ch | 28, 36, 52, 84 | 1 | Yes | 128-bit Unique ID, AES128, AES256, GHASH, TRNG | Synergy MCU | No | No | No | No | 2030 Dec, 2033 May, 2036 Mar, 2037 Dec | -40 to +85°C, -40 to +105°C |
| 48MHz Arm Cortex-M4 CPU | S3 | M4 | 1024 | 16 | 192 KB | 64, 100, 121, 144, 145 | 1.6 - 5.5 | 48 | 12-bit x 2-ch | 50, 82, 102, 124 | 1 | Yes | 128-bit Unique ID, AES128, AES256, GHASH, TRNG | Synergy MCU | No | No | No | No | 2030 Dec, 2031 Jun, 2036 Mar | -40 to +85°C, -40 to +105°C |
| 120MHz Arm Cortex-M4 CPU | S5 | M4 | 512 | 8 | 256 KB | 64, 100 | 2.7 - 3.6 | 120 | 12-bit x 2-ch | 40, 76 | 2 | Yes | 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA and more... |
Synergy MCU | No | No | No | No | 2033 Oct, 2036 Mar | -40 to +85°C, -40 to +105°C |
| 120MHz Arm Cortex-M4 CPU | S5 | M4 | 512, 1024 | 32 | 384 KB | 100, 144, 145 | 2.7 - 3.6 | 120 | 12-bit x 2-ch | 76, 110 | 2 | Yes | 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA and more... |
Synergy MCU | Yes | Yes | No | No | 2033 Jun, 2033 Oct, 2034 Mar, 2036 Mar, 2037 Dec | -40 to +85°C, -40 to +105°C |
| 120MHz Arm Cortex-M4 CPU | S5 | M4 | 1024, 2048 | 64 | 640 KB | 100, 144, 145, 176 | 2.7 - 3.6 | 120 | 12-bit x 2-ch | 76, 110, 133 | 2 | Yes | 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA and more... |
Synergy MCU | Yes | Yes | No | No | 2032 Jun, 2033 Oct, 2034 Mar, 2036 Mar, 2037 Dec | -40 to +85°C, -40 to +105°C |
| 240MHz Arm Cortex-M4 CPU | S7 | M4 | 3072, 4096 | 64 | 640 KB | 100, 144, 145, 176, 224 | 2.7 - 3.6 | 240 | 12-bit x 2-ch | 70, 104, 126, 172 | 2 | Yes | 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA and more... |
Synergy MCU | Yes | Yes | No | No | 2033 Oct, 2037 Dec | -40 to +85°C, -40 to +105°C |
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