Overview
Description
JEDEC compliant Advanced Memory Buffer for Fully buffered DIMMs. 3.2, and 4.0 Gb/s serial speeds (DDR2-533 and 667 DRAM). Support for up to eight DIMMs per channel.
Features
- Leverages high-speed serial technology for DRAM interface
- Supports 3.2, 4.0 and 4.8 Gbits serial speeds (DDR2-533/667)
- Support for 14 northbound lanes (read) and 10 southbound lanes (write)
- Support for up to 8 DIMMs per channel
Comparison
Applications
Documentation
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| Type | Title | Date |
| End Of Life Notice | PDF 15 KB | |
| Flyer | PDF 728 KB | |
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Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
Processing table
| FCBGA | 655 | C | No | Tray | ||
| FCBGA | 655 | C | No | Reel |
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