82V2042E

The 82V2042E can be configured as a dual-channel T1, E1, or J1 Line Interface Unit (LIU). The 82V2042E performs clock/data recovery, AMI/B8ZS/HDB3 line decoding, and detects and reports the Loss of Signal (LOS) conditions. An integrated adaptive equalizer is available to increase the receive sensitivity and enable the programming of LOS levels. In the transmit path, there is an AMI/B8ZS/HDB3 encoder and waveform shaper. There is one jitter attenuator, which can be placed in either the receive path or the transmit path. The jitter attenuator can also be disabled. The 82V2042E supports both single-rail and dual-rail system interfaces. To facilitate network maintenance, a PRBS/QRSS generation/detection circuit is integrated into the chip and different types of loopbacks can be set according to the applications. Four different kinds of line terminating impedances, 75Ω, 100Ω, 110Ω, and 120Ω are selectable on a per channel basis. The chip also provides driver short circuit protection and an internal protection diode and supports JTAG boundary scanning. The chip can be controlled by either software or hardware. The 82V2042E can be used in LAN, WAN, routers, wireless base stations, IADs, IMAs, IMAPs, gateways, frame relay access devices, CSU/DSU equipment, etc.