Overview

Description

The 5DB0148HA0 is a dual 4-bit bidirectional data buffer with differential strobes is designed for 1.1V, VDD operation. The device has a dual 4-bit host bus interface that is connected to a memory controller and a dual 4-bit DRAM interface that is connected to two x4 DRAMs. It also has an input-only control bus interface that is connected to a DDR5 Register.

Features

  • Pinout optimized for DDR5 LRDIMM PCB layout
  • DDR5 Server speeds up to 4800MT/s
  • Supports power-down modes to conserve server power
  • Supports 1-rank / 2-rank DIMM configurations
  • Supports SDP and 3DS DRAM types
  • Provides access to internal control words for configuring device
  • Features and adapting to different LRDIMM and system applications
  • Loopback and pass-through modes
  • Training support features for DQ and MDQ interfaces
  • ZQ calibration

Comparison

Applications

Documentation

Type Title Date
Datasheet - Short-form Log in to Download PDF 131 KB
1 item

Design & Development

Models