Overview

The 71T75802 2.5V CMOS Synchronous SRAM organized as 1M x 18 (18 Megabit). It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus, it has been given the name ZBTTM, or Zero Bus Turnaround. The 71T75802 contains data I/O, address and control signal registers.

71T75802 - Block Diagram for 1M x18
71T75802 - Block Diagram for 1M x18
  • High performance system speed - 200 MHz (3.2 ns Clock-to-Data Access)
  • ZBTTM Feature - No dead cycles between write and read cycles
  • Internally synchronized output buffer enable eliminates the need to control OE
  • Single R/W (READ/WRITE) control pin
  • Positive clock-edge triggered address, data, and control signal registers for fully pipelined applications
  • 4-word burst capability (interleaved or linear)
  • Individual byte write (BW1 - BW4) control (May tie active)
  • Three chip enables for simple depth expansion
  • 2.5V power supply (±5%)
  • 2.5V I/O Supply (VDDQ)
  • Power down controlled by ZZ input
  • Boundary Scan JTAG Interface (IEEE 1149.1 Compliant)
  • Available in 100-pin TQFP and 119-pin BGA packages

Documentation

Design & Development

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

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Product Options

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    Moisture Sensitivity Level (MSL)
    Price (USD) | 1ku
    Buy / Sample
    Part Number
    71T75802S133PFG
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    		 TQFP 100 C Yes Tray 3 29.84 Get Samples,
    71T75802S133PFGI
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    		 TQFP 100 I Yes Tray 3 Get Samples,
    71T75802S166PFG
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    Samples Available
    		 TQFP 100 C Yes Tray 3 19.8 Get Samples,
    71T75802S166PFGI
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    		TQFP 100 I Yes Tray 3 Get Samples,
    71T75802S200PFG
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    Samples Available
    		 TQFP 100 C Yes Tray 3 34.62 Get Samples,
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