Overview
Description
The flip-flop has independent data, preset, clear, and clock inputs and Q and Q outputs. The logic level present at the data input is transferred to the output during the positive going transition to the clock pulse. Preset and clear are independent of the clock and accomplished by a low level at the appropriate input.
Features
- High-Speed Operation: tpd (Clock to Q or Q) = 14 ns typ (CL = 50 pF)
- High Output Current: Fanout of 10 LSTTL Loads
- Wide Operating Voltage: VCC = 2 to 6 V
- Low Input Current: 1 µA max
- Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C)
Comparison
Applications
Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.
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