ISL6537A

The ISL6537A provides a complete ACPI compliant power solution for up to 4 DIMM dual channel DDR/DDR2 Memory systems. Included are both a synchronous buck controller to supply V_DDQ during S0/S1 and S3 states. During S0/S1 state, a fully integrated sink-source regulator generates an accurate (V_DDQ/2) high current V_TT voltage without the need for a negative supply. A buffered version of the V_DDQ/2 reference is provided as V_REF. A second PWM controller, which requires external MOSFET drivers, is available for regulation of the GMCH Core voltage. An LDO controller is also integrated for the CPU V_TT termination voltage regulation and the DAC. The switching PWM controller drives two N-Channel MOSFETs in a synchronous-rectified buck converter topology. The synchronous buck converter uses voltage-mode control with fast transient response. The switching regulator provides a maximum static regulation tolerance of ±2% over line, load, and temperature ranges. The output is user-adjustable by means of external resistors down to 0. 8V. An integrated soft-start feature brings all outputs into regulation in a controlled manner when returning to S0/S1 state from any sleep state. During S0 the VIDPGD signal indicates that the GMCH and CPU V_TT termination voltage is within spec and operational. All outputs, except VDAC, have undervoltage protection. The switching regulator also has overvoltage and overcurrent protection. Thermal shutdown is integrated.