ISL78424EVAL3Z

The ISL78424EVAL3Z evaluation board is designed to provide a quick and comprehensive method for evaluating the ISL78424 100V 3A source, 4A sink half-bridge driver for driving the gates of two NMOS FETs in a half-bridge configuration. Two N-channel MOSFETs are included on the evaluation board to allow for the evaluation of a half-bridge driven load such as a DC motor or a synchronous switching regulator.

The ISL784x4 family of FET drivers are offered in a 14 Ld HTSSOP package enhanced with a thermal EPAD. They operate from a supply voltage of 8V to 18V DC with the capability of driving a high-side N-channel FET in a 70V half-bridge configuration. A unique tri-level PWM input (ISL78424 and ISL78444 only) allows control of both the high-side and low-side gate drivers with a single input. If the PWM pin is left floating, internal pull-up and pull-down resistors bias the PWM pin to the mid-level state. The mid-level state has both high-side and low-side sink drivers active to disable both MOSFETs, which is beneficial for multiphase DC/DC converters that require phase dropping or to implement asynchronous operation in a synchronous DC/DC converter. The ISL78434 has independent HI and LI driving pins that control their respective FET output driver signal. The ISL78434 features an input lockout protection to prevent both driver outputs going active high at the same time. The driver locks out any input logic from propagating to that driver output if the other input is already logic high.

The ISL78424 and ISL78434 feature separate pins for the sourcing and sinking driver outputs. The HO_H and HO_L are the high-side sourcing and sinking drivers, respectively. And, the LO_H and LO_L are the low-side sourcing and sinking drivers, respectively. Separate source and sink output pins allow for optimizing the FET turn on/off times using gate drive limiting resistors.