Processing table
PLP |
Bootstrap Supply Voltage (Max) (V) |
VBIAS (Max) (V) |
Peak Pull-up Current (A) |
Peak Pull-down Current (A) |
Turn-On Prop Delay (ns) |
Turn-Off Prop Delay (ns) |
Rise Time (μs) |
Fall Time |
Temp. Range |
Input Logic Level |
Qualification Level |
Lead Count (#) |
Pkg. Type |
Simulation Model Available |
|
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Part Number | |||||||||||||||
| 100V/2A Peak High-Frequency Half Bridge Driver with CMOS Logic Inputs | N/A | 114 | 14 | 2 | 2 | 20 | 20 | .01 | 10 | -40 to +85°C | CMOS | Standard | 8, 16 | QFN, SOICN, SOICN-EP | |
| 100V/2A Peak High-Frequency Half Bridge Driver with TTL Logic Inputs | N/A | 114 | 14 | 2 | 2 | 25 | 25 | .01 | 10 | -40 to +85°C | 3.3V/TTL | Standard | 8, 12, 16 | DFN, QFN, SOICN, SOICN-EP | |
| 60V, 1A/2A Peak, Half-Bridge Driver with 4V UVLO | N/A | 60 | 14 | 1 | 2 | 28 | 30 | .021 | 17 | -40 to +125°C | 3.3V/TTL | Standard | 8 | SOICN, TDFN | |
| 60V, 1A/2A Peak, Half Bridge Driver with 4V UVLO and Two Internal LDO’s 12V and 3.3V | N/A | 60 | 14 | 1 | 2 | 23 | 27 | .021 | 17 | -40 to +125°C | 3.3V/TTL | Standard | 12 | DFN | |
| 100V, 3A Source, 4A Sink, High Frequency Half-Bridge Drivers with Tri-Level PWM Input and Adjustable Dead Time | N/A | 115 | 18 | 3 | 4 | 15 | 15 | .02 | 20 | -40 to +125°C | Tri-level | Standard | 10 | TDFN | iSim |
| 100V, 3A Source, 4A Sink, High Frequency Half-Bridge Drivers with HI/LI Input | 2033 Dec | 115 | 18 | 3 | 4 | 15 | 15 | .02 | 20 | -40 to +125°C | 3.3V/TTL | Standard | 8, 10 | DFN, SOICN, TDFN | iSim |
| 80V/2.5A Peak, High Frequency Full Bridge FET Driver with Charge Pump and Input Comparators | N/A | 95 | 15 | 2.6 | 2.4 | 70 | 50 | .01 | 10 | -40 to +85°C | 3.3V/TTL | Standard | 20 | PDIP, SOICW | |
| 80V/2.5A Peak, High Frequency Full Bridge FET Driver with Charge Pump and Independent Control Inputs | N/A | 95 | 15 | 2.6 | 2.4 | 60 | 35 | .01 | 10 | -40 to +85°C | 3.3V/TTL | Standard | 20 | PDIP, SOICW | |
| 80V/1.25A Peak Current Full Bridge FET Driver | 2033 Dec | 95 | 15 | 1.4 | 1.3 | 75 | 55 | .009 | 9 | -55 to +125°C | 3.3V/TTL | Standard | 16 | PDIP, SOICN | |
| 100V, 2A Peak, High Frequency Half-Bridge Drivers | N/A | 114 | 14 | 2 | 2 | 39 | 31 | .01 | 10 | -40 to +85°C | CMOS | Standard | 9 | DFN | |
| 100V, 2A Peak, High Frequency Half-Bridge Drivers | N/A | 114 | 14 | 2 | 2 | 39 | 34 | .01 | 10 | -40 to +85°C, -40 to +125°C | 3.3V/TTL | Standard | 8, 9 | DFN, SOICN | |
| 100V, 3A/4A Peak, High Frequency Half-Bridge Drivers | N/A | 114 | 14 | 3 | 4 | 38 | 32 | .009 | 7.5 | -40 to +125°C | CMOS | Standard | 8 | SOICN | |
| 100V, 3A/4A Peak, High Frequency Half-Bridge Drivers | N/A | 114 | 14 | 3 | 4 | 38 | 32 | .009 | 7.5 | -40 to +125°C | 3.3V/TTL | Standard | 8, 10, 12 | DFN, SOICN, TDFN | |
| 80V/1.25A Peak High-Frequency Half Bridge Driver with TTL Logic Inputs | N/A | 95 | 15 | 1.4 | 1.3 | 70 | 60 | .005 | 5 | -40 to +85°C | 3.3V/TTL | Standard | 8 | SOICN | |
| 100V, 2A Peak, Half-Bridge Driver with Tri-Level PWM Input and Adjustable Dead-Time | N/A | 114 | 14 | 2 | 2 | 32 | 32 | -40 to +125°C | 5V | Automotive | 14 | TSSOP-EP | |||
| 100V Boot, 4A Peak, Half-Bridge Driver with Single PWM Input and Adaptive Dead Time Control | N/A | 100 | 18 | 3 | 4 | 45 | 45 | 10 | 0.01 | Tri-Level | Automotive | 14 | TSSOP-EP | ||
| 100V Boot, 4A Peak, Half-Bridge Driver with Single PWM Input and Adaptive Dead Time Control | N/A | 100 | 18 | 3 | 4 | 45 | 45 | 10 | 0.01 | Tri-Level | Automotive | 14 | TSSOP-EP | ||
| 100V Boot, 4A Peak, Half-Bridge Driver with Single PWM Input and Adaptive Dead Time Control | N/A | 100 | 18 | 3 | 4 | 45 | 45 | 10 | 0.01 | Tri-Level | Automotive | 14 | TSSOP-EP |
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