Overview
Description
The HM-6514/883 is a 1024 x 4 static CMOS RAM fabricated using self-aligned silicon gate technology. The device utilizes synchronous circuitry to achieve high performance and low power operation. On chip latches are provided for addresses allowing efficient interfacing with microprocessor systems. The data output can be forced to a high impedance state for use in expanded memory arrays. Gated inputs allow lower operating current and also eliminates the need for pull up or pull down resistors. The HM-6514/883 is fully static RAM and may be maintained in any state for an indefinite period of time. Data retention supply voltage and supply current are guaranteed over temperature.
Features
- This Circuit is Processed in Accordance to MIL-STD- 883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1.
- Low Power Standby 125µW Max
- Low Power Operation 35mW/MHz Max
- Data Retention at 2.0V Min
- TTL Compatible Input/Output
- Common Data Input/Output
- Three-State Output
- Standard JEDEC Pinout
- Fast Access Time 120/200ns Max
- 18 Pin Package for High Density
- Gated Inputs - No Pull Up or Pull Down Resistors Required
- On-Chip Address Register
Comparison
Applications
Documentation
Featured Documentation
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| Type | Title | Date |
| Datasheet | PDF 342 KB | |
| Brochure | PDF 5.02 MB | |
| Product Change Notice | PDF 323 KB | |
| End Of Life Notice | PDF 200 KB | |
| Product Advisory | PDF 282 KB | |
| Product Change Notice | PDF 174 KB | |
| Product Change Notice | PDF 151 KB | |
| Application Note | PDF 338 KB | |
| Application Note | PDF 224 KB | |
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Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
Processing table
| CERDIP | Tube | 200 | ||
| CERDIP | Tube | 120 |
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