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Simulator for CS+ of RX Family

Simulator

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Overview

This simulator product makes source level debugging of applications possible in the Renesas integrated development environment, or the CS+, while the target system is not available on hand.

The simulator debugger's exclusive functions (high-function debugging) permits the programs written in C/C++ language or assembly language to be debugged efficiently while the actual MCU is not available on hand.

  • High-accuracy simulation (Cycle accurate) (Note1)
  • Simulated I/O function (Standard and file input/output functions usable)
  • Virtual interrupt function (Simulation of interrupt operations possible. Virtual interrupts using arbitrary timing and break conditions. Timer module based internal interrupts possible.)

Furthermore, an intuitively understandable easy GUI (graphical user interface) provides a comfortable debug environment.

Note

  1. Cycle-accurate simulation is only supported when the selected MCU includes the RXv1 core. Check which products include the RXv1 core on this page.
  • Since the simulator/debugger runs on the host computer, the user can start debugging the program while the actual MCU is not available on hand. This will result in a reduced development period of the entire system.
  • The number of instruction execution cycles is calculated by simulating. This enables performance evaluation even in the absence of the actual MCU.
  • The functions outlined below are available, which permit program test and debug to be proceeded efficiently.
    • Support each CPU in the RX Family.
    • If an error occurs while the program under debug is running, the user can choose to continue ignoring the error or stop the program.
    • Get profile data and measure performance one function at a time.
    • Comprehensive break functions (virtual interrupt operations also possible).
    • Set and edit memory map.
    • Display a history of function calls.
    • Display C/C++ and assembler source level coverages.
    • Visual debug function based on waveform display.
  • The simulator/debugger runs under Windows, allowing breakpoints, memory map, performance and trace to be set in dialog boxes. The environment setup suitable for the memory map of MCU in the RX Family can also be set in a dialog box.
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Operating Environment

This product is included in the C/C++ Compiler Package for RX Family (for CS+). When the compiler package is installed, the functions of this simulator are added to the CS+.

Documentation

Additional Details

Functions

  • Work efficiency is increased, thanks to builder and debugger integration.
  • ELF/DWARF2 object formats are supported.
  • Number of execution cycles and the number of calls are graphically displayed one function at a time.
  • The stack is traced.
  • Comprehensive breakpoint functions are supported (virtual interrupt operations also possible).
  • Assembler source level coverage display.
  • Visual debug function based on waveform display.

Simulation Range

[Functions Supported by This Simulator Debugger]

  • All executable instructions
  • Exception processing
  • Registers
  • Entire address space
  • Peripheral function (Timer) (Note1)

Note

  1. Support for the CMT-related features in the interrupt controller (ICU) and a total of four compare match timer (CMT) channels, i.e. two CMT units (unit 0 and unit 1), each with two 16-bit timers.

[Functions Not Supported by This Simulator Debugger] (Note3)

  • Low power state (Note1)
  • Non-maskable interrupt (NMI)
  • Reception of an interrupt during execution of any of the following instructions (Note2): RMPA, SCMPU, SMOVF, SMOVB, SMOVU, SSTR, SUNTIL, SWHILE
  • Values in memory and registers that become undefined after the execution of instructions
  • Lower-order 16 bits of the accumulator (ACC)

Notes

  1. Simulation is stopped on the execution of a WAIT instruction.
  2. The interrupt is accepted when execution of the instruction is completed.
  3. Use an emulator to debug these functions.