Overview
Description
The IDT ADC demonstration board is suitable for dynamic performances evaluation from low to high IF configuration. A FPGA mother board (Xilinx, Altera ) could be connected to ease the evaluation and analysis of the ADC dynamic and enable usage of the JESD204B full features sets.
Features
- SMA connector for clock and analog input signals
- JESD204B outputs up to 5 Gbps (HSMC connector)
- Optional HSMC to FMC adaptor board
- Single power supply (on-board regulators)
Applications
Documentation
= Featured Documentation
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Type | Title | Date |
Manual - Hardware | PDF 4.47 MB | |
Manual - Software | ZIP 4.59 MB | |
Schematic | PDF 4.20 MB | |
3 items
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