Renesas Electronics Announces Development of Package Design Technology for Implementation of High-Speed Interfaces at Low-Cost

TOKYO, Japan, June 9, 2010 — Renesas Electronics Corporation (TSE: 6723), a premier supplier of advanced semiconductor solutions, today announced its successful development of new package design technology, which includes accurate electromagnetic (EM) analysis of the complex interactions between signals, power supplies and ground (Note 1) inside the wire-bonding BGA (Ball Grid Array) packages using an electromagnetic analysis tool from Physware, Inc., as well as an accurate simulation method of the simultaneous switching output (Note 2) of the packaged devices. The new technology makes it possible to design low-cost wire-bonding BGA packages for the next-generation double data rate (DDR) memory interface that supports data transfer rates of 2 Gbps (gigabits per second) and above.

Key features of the newly developed EM analysis technology and the simulation method are as follows:

(1) An inside of the wire-bonding package has been analyzed by employing a boundary element method based on the EM analysis tool from Physware, Inc. that places analysis elements only on the conductor surface. The new EM analysis technology has enabled successful analysis of the large-scale three-dimensional structures consisting of signal, power supplies and ground in more than 32-bit size, in a short period of time, in high-precision and over a broadband ranging frequency from near direct current (DC) to 20 gigahertz (GHz). By simultaneously analyzing signals, power supplies and ground, the accuracy of the return current that flows in the opposite direction as the signals to neutralize the electrical charge carried by the signal has been significantly improved.

(2) A new simulation method has been developed to eliminate the return current path discontinuity, which arises when the model based on the new EM analysis technology is combined with other model components of the memory systems, such as printed wiring boards. First, the return current path model and corresponding ground terminals have been numerically extracted from the broadband EM analysis results based on the fact that signal-power interaction implicitly contains the return current path. By subsequently connecting the generated ground terminals to every other model component, the return current path consistency has been guaranteed, which provides highly precise simulation results closely describing the actual device characteristics.

Recently the memory bandwidth has been significantly increasing, with an example of DDR3, not only for PCs and communication devices but also for consumer devices, which raises expectations of increased speed and lower cost. However, the adoption of the low-cost wire-bonding package has difficulty in design due to strong electromagnetic interaction especially between bonding-wires, which causes an adverse effect on signal transfer performance. This design difficulty has been avoided through the use of flip-chip packages that provide excellent performance but are also more expensive.

Renesas Electronics has been engaging in the development of the high-speed differential signal design technologies for low-cost wire-bonding BGA packages. Since the total number of signals is relatively small in the case of high-speed differential signals, there is no scaling issue even if all electromagnetic interactions inside the package are calculated. However, an electromagnetic analysis of the high-speed memory interface requires analyzing the high-density wiring of nearly 32-bit signals, which makes the electromagnetic analysis technology capable of handling large-scale 3D structures and highly precise simulation methods essential.

Generally, high-frequency electromagnetic analysis only determines the frequency response of the electromagnetic field against the nearby ground, and therefore does not guarantee consistency between the return current paths (grounds) of individual analysis results. For this reason, the conventional simulation method that simply combines the multiple analysis results generates a return current discontinuity, which causes artificial signal waveform degradation from the actual characteristics. As a result, it has been difficult to design memory products using low-cost wire-bonding packages.

Renesas Electronics has applied the new electromagnetic analysis technology and simulation method to its SoC (system-on-chip) device incorporating a 32-bit DDR interface in a wire-bonding BGA package and carried out a simultaneous switching output simulation including printed wiring board model, which has successfully replicated an accurate simultaneous switching output behavior of the SoC device.

Renesas Electronics plans to apply the newly developed simulation technology in package design for next-generation high-speed interfaces such as DDR4 in order to achieve both improved performance and low cost.

This research result was presented on June 3, 2010 at the 60th Electronic Components and Technology Conference in Las Vegas, Nevada, USA, which was in session from June 1 to 4, 2010.

(Note 1) Ground: Conductors of voltage reference.

(Note 2) Simultaneous switching output: To simultaneously turn on or off multiple output signals, which is commonly referred to as the worst case operating condition due to its large instantaneous switching current.

About Renesas Electronics Corporation

Renesas Electronics Corporation (TSE: 6723) delivers trusted embedded design innovation with complete semiconductor solutions that enable billions of connected, intelligent devices to enhance the way people work and live. A global leader in microcontrollers, analog, power and SoC products, Renesas provides comprehensive solutions for a broad range of automotive, industrial, infrastructure, and IoT applications that help shape a limitless future. Learn more at renesas.com. Follow us on LinkedIn, Facebook, Twitter, and YouTube.

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