Overview
Description
The 557-06 is a two to four differential clock mux designed for use in PCI-Express applications. The device selects one of the two differential HCSL input pairs and fans out to four pairs of differential HCSL or LVDS outputs.
Features
- Packaged in 20-pin TSSOP
- Pb (lead) free packaging
- Operating voltage of 3.3 V
- Low power consumption
- Input differential clock of up to 200 MHz
- Jitter 60 ps (cycle-to-cycle)
- Output-to-output skew of 50 ps
- Available in industrial temperature range (-40 to +85°C)
- For PCIe Gen2/3 applications, see the 5V41067A
Comparison
Applications
Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
Processing table
| TSSOP | 20 | Tube | 1 | 0 | 74 | Yes | e3 Sn | 0 to 70°C | |||
| TSSOP | 20 | Reel | 1 | 3000 | 0 | Yes | e3 Sn | 0 to 70°C | |||
| TSSOP | 20 | Tube | 1 | 0 | 74 | Yes | e3 Sn | -40 to +85°C | |||
| TSSOP | 20 | Reel | 1 | 3000 | 0 | Yes | e3 Sn | -40 to +85°C |
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Videos & Training
PCIe Clocking Architectures (Common and Separate)
This is the first video in our PCIe series. In this video, we define PCIe architectures, focusing on common and separate clock architectures. Watch the rest of the video series below where Ron will cover the impact of different timing architectures.
Watch the Video Series Below
Video List
