FemtoClock 2 Evaluation Kit
This is the evaluation kit for the RC32504A and RC22504A point-of-use jitter attenuator and clock generators. The board comes populated with an RC32504A device. The...
Featured Documents:
Overview
Description
The RC32504A is a small, low-power timing component designed to be placed immediately adjacent to a PHY, switch, ASIC, or FPGA that requires several reference clocks with a jitter performance of less than 100fs. The RC32504A can act as a frequency synthesizer to locally generate the reference clock, a jitter attenuator to perform local clean-up and/or frequency translation of a centrally-supplied reference, a synchronous Ethernet equipment clock to perform passband filtering and clean-up of network-supplied references or as a DCO for frequency margining or OTN clock applications.
Features
- Jitter below 100fs RMS (10kHz to 20MHz)
- Compliant with ITU-T G.8262 for synchronous Ethernet/OTN (EEC/OEC) and ITU-T G.8262.1 for enhanced synchronous Ethernet/OTN (eEEC/eOEC)
- PLL core consists of fractional-feedback Analog PLL (APLL) which can optionally be steered by a Digital PLL (DPLL)
- Operates from a 25MHz to 80MHz crystal or XO
- APLL frequency independent of input/crystal frequency
- Operates as a frequency synthesizer, jitter attenuator, synchronous equipment slave clock or Digitally Controlled Oscillator (DCO)
- DPLL loop filter programmable from 0.1Hz to 12kHz
- DCO has a tuning granularity of < 1ppb
- Programmable input buffer supports HCSL, LVDS, or two LVCMOS with no external terminations needed
- Input frequencies: 1MHz to 800MHz (250MHz for LVCMOS)
- Reference monitor qualifies/disqualifies input clock
- Programmable status output
- 4 differential/8 LVCMOS outputs
- Any frequency from 10MHz to 1GHz (180MHz for LVCMOS)
- Programmable output buffer supports HCSL (DC-coupled), LVDS/LVPECL/CML (AC-coupled) or two LVCMOS
- Differential output swing is selectable: 400mV to 800mV
- Output clock phase individually adjustable in 100ps steps
- Output Enable input with programmable effect
- Supports up to 1MHz I²C or up to 20MHz SPI serial processor port
- Can configure itself automatically after reset through internal customer-definable One-Time Programmable (OTP) memory with up to four different configurations
- 4mm × 4mm 24-VFQFPN package
Comparison
Applications
Design & Development
Software & Tools
Software & Tools
| Software title
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Software type
|
Company
|
|---|---|---|
| Renesas IC Toolbox (RICBox) The Renesas IC Toolbox (RICBox) software platform enables customers to configure Renesas devices on evaluation kits when attached to the computer running the software.
|
Software Package | Renesas |
1 item
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Boards & Kits
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
This device is factory-configurable. Try the Custom Part Configuration Utility.
Processing table
| VFQFPN | 24 | -40 to +85°C | I | Yes | Tray | 1 | 9.598 | Get Samples, | |
| VFQFPN | 24 | -40 to 85°C | I | Yes | Reel | 1 |
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- Hide Filters button in header: Collapse or expands filters
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- Export button in header: Export the filtered results of the table to an Excel document
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- Hide column button in column headers: Select to hide columns in table
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- Multiselect checkboxes at beginning of each row in table: Select these checkboxes to compare products against each other
- Document icon next to product name in row: View the featured document for this product
- Chip icon next to the right of the document icon in row: View the block diagram for this product
- Cart icon to the right of the chip icon: Indicates that samples are available for this product
Videos & Training
Lab on the Cloud Demo for FemtoClock®2 Ultra-Low Phase Noise Synthesizer and Jitter Attenuator
Demonstration of Renesas’ Lab on the Cloud virtual environment for FemtoClock®2 ultra-low phase noise synthesizer and jitter attenuator.
Video List
