Overview
Description
The 71V65903 3.3V CMOS SRAM is organized as 512K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBT™, or Zero Bus Turnaround. The 71V65903 contain address, data-in and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.
Features
- High performance system speed - 100 MHz
- (7.5 ns Clock-to-Data Access)
- ZBT Feature - No dead cycles between write and read
- cycles
- Internally synchronized output buffer enable eliminates the need to control OE
- Single R/W (READ/WRITE) control pin
- 4-word burst capability (Interleaved or linear)
- Individual byte write (BW1 - BW4) control (May tie active)
- Three chip enables for simple depth expansion
- 3.3V power supply (±5%)
- 3.3V (±5%) I/O Supply (VDDQ)
- Power down controlled by ZZ input
- Available in 100-pin TQFP, 119-pin BGA and 165 fpBGA packages
Comparison
Applications
Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
Processing table
Pkg. Type |
Lead Count (#) |
Temp. Grade |
Pb (Lead) Free |
Carrier Type |
Moisture Sensitivity Level (MSL) |
Price (USD) | 1ku |
Buy / Sample |
|
|---|---|---|---|---|---|---|---|---|
| Part Number | ||||||||
| CABGA | 165 | C | Yes | Tray | 3 | 22.21 | ||
| TQFP | 100 | I | Yes | Tray | 3 | 23.16 | Get Samples, | |
| TQFP | 100 | I | Yes | Tray | 3 | 23.16 | Get Samples, |
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