GreenPAK™ Power Sequencer

Using GreenPAK™ family of devices, it is easy to implement custom power sequencer designs in an extremely small area, using minimal power and board space. It is no secret that successfully powering up a system can be tricky as well as powering one off. Timing, order of events, and power levels need to be just right for proper system functionality and stability. Using a power sequencer can prevent unnecessary current draw while portions of the design sit idle, waiting for prerequisite systems to be powered. Some FPGAs, for example, may require more than ten rails, which if sequenced using discrete components, could introduce extra power and board space overhead. When paired with the tiny, ultra-low R_DSON GreenFET™ Integrated Power Switch, power sequencing with Dialog is an incredibly efficient solution. Moreover, a power sequencer can be easily built on any GreenPAK IC.

Often in various combinations in a single system, some common methods for power sequencing include:

• Fixed timing
• Power Good
• I²C Acknowledge
• Voltage Sensing

GreenPAK Benefits for Power Sequencing

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Fixed Delay Sequencing

One method for sequencing multiple sub-systems is to allot a fixed amount of time for each start-up sequence. This is appropriate for systems which do not feature a Power Good signal. Finding a discrete solution with the exact delay timings needed can take hours, but with GreenPAK's configurable logic and timing resources, developing a custom system is easy.

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Example 1. Fixed Delay Sequencing

Key Design Considerations

Delay Time – Using GreenPAK's internal oscillators and CNT/DLY blocks, it is possible to address a wide range of timing requirements

ON Signal Polarity – GreenPAK can be configured to output active high or low using integrated inverters and LUTs

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Example 1. GreenPAK Implementation

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Example 1. Timing Diagram

Power Good

Many ICs have the ability to produce a Power Good (PG) signal once the respective systems have finished their start-up routine. This can be useful in systems where start-up time is not fixed and may depend on multiple variables.

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Example 2. Sequencing with Power Good

Key Design Considerations

ON and PG Signal Polarity - GreenPAK can be configured to output active high or low using integrated inverters and LUTs.

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Example 2. GreenPAK Implementation

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Example 2. Timing Diagram

I²C Acknowledge

Another option in programmable systems with I²C is to send a command to the power sequencer, in this case GreenPAK, to let it know start-up was completed successfully. Using GreenPAK's I²C virtual inputs, it is easy to treat an I²C command just like a digital Power Good signal.

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Example 3. Power Sequencer with I²C Acknowledge

Key Design Considerations

I²C Speed – GreenPAK I2C supports up to 400 kHz

I²C Address – GreenPAK can have up to 16 unique I2C addresses

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Example 3. GreenPAK Implementation

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Example 3. Timing Diagram

Voltage Sensing

To ensure system stability, many SOCs, DSPs, and FPGAs require a minimum voltage for startup. Monitoring the power level of a rail can be done simply using GreenPAK's configurable analog comparators.

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Example 4. Power Sequencer with Voltage Sensing

Key Design Considerations

Over-voltage/Under-voltage Threshold – Supply tolerances vary, but using GreenPAK with integrated ACMPs enables reliable sequencing over a wide range of user-specified conditions

Time Sensitive Voltage Limits – Varying periods of voltages outside the limit may be tolerable for some systems. GreenPAK's configurable CNT/DLY blocks can be used to reject reset events below a wide range of time thresholds

Hysteresis – Nominal voltage requirements may incorporate hysteresis. GreenPAK's ACMPs can be configured with 25, 50, or 200 mV hysteresis

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Example 4. GreenPAK Implementation

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Example 4. Timing Diagram

GreenPAK Power Sequencer Demo Board is available for purchase. Please email us at [email protected] to learn more details.