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Description

The 9DBV0831 is an 8-output very low power buffer for 100MHz PCIe Gen1–5 applications. It can also be used for 50M or 125M Ethernet Applications via software frequency selection. The device has 8 output enables for clock management, and 3 selectable SMBus addresses.

Features

  • 1.8V operation: minimal power consumption
  • Outputs can optionally be supplied from any voltage between 1.05V and 1.8V; maximum power savings
  • OE# pins: support DIF power management
  • HCSL compatible differential input: can be driven by common clock sources
  • LP-HCSL differential clock outputs: reduced power and board space
  • Programmable slew rate for each output: allows tuning for various line lengths
  • Programmable output amplitude: allows tuning for various application environments
  • Pin/software selectable PLL bandwidth and PLL Bypass: minimize phase jitter for each application
  • Outputs blocked until PLL is locked: clean system start-up
  • Software selectable 50MHz or 125MHz PLL operation: useful for Ethernet Applications
  • Configuration can be accomplished with strapping pins: SMBus interface not required for device control
  • 3.3V tolerant SMBus interface works with legacy controllers
  • Space-saving 6 x 6 mm 48-VFQFPN: minimal board space
  • Selectable SMBus addresses: multiple devices can easily share an SMBus segment

Comparison

 

Applications

 
 

Models

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

Diagram of ECAD Models
 

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