Overview
Description
The XA is a quartz-based PLL clock oscillator family with <1000fs phase jitter that conforms to the AEC-Q200 automotive requirements. Available in a wide frequency range from 0.750MHz to 1350MHz, the XA series crystal oscillators utilize a family of proprietary ASICs, with a key focus on noise reduction technologies.
The 3rd order Delta Sigma Modulator reduces noise to the levels that are comparable to traditional Bulk Quartz and SAW oscillators. With short lead-time, low cost, low noise, wide frequency range, excellent ambient performance, the XA devices are an excellent choice over the conventional technologies. The XA devices have stabilities as tight as ±25ppm. This series provides extremely quick delivery for both standard and custom frequencies.
Features
- Conforms to AEC-Q200
- Frequency range: 0.750MHz to 1350MHz
- Output types: LVDS, LVPECL, LVCMOS
- Phase jitter (12kHz to 20MHz): 750fs to 890fs typical (1000fs max)
- Supply voltage: 2.5V or 3.3V
- Package options:
- 3.2 x 2.5 x 1.0 mm
- 5.0 x 3.2 x 1.2 mm
- Frequency stability: ± 25ppm, ± 50ppm, or ± 100 ppm
- Operating temperatures: -40°C to +85°C
- Frequency stability: ± 50ppm, or ± 100 ppm
- Operating temperatures: -40°C to +105°C
Comparison
Applications
Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
This device is factory-configurable. Try the Custom Part Configuration Utility.
Processing table
| 6.005284 | 3.2 x 2.5 x 0.9 | 3.3 | 50 | Yes | 1 | 2.46 | Get Samples, | |
| 6.005284 | 3.2 x 2.5 x 0.9 | 3.3 | 50 | Yes | 1 | 2.73 | Get Samples, | |
| 25 | 3.2 x 2.5 x 0.9 | 3.3 | 50 | 1 | 1.584 | Get Samples, | ||
| 25 | 3.2 x 2.5 x 0.9 | 3.3 | 50 | Yes | 1 | 1.758 | Get Samples, | |
| 30 | 3.2 x 2.5 x 0.9 | 3.3 | 50 | 1 | 1.523 | Get Samples, | ||
| 30 | 3.2 x 2.5 x 0.9 | 3.3 | 50 | 1 | Get Samples, | |||
| 5.0 x 3.2 x 1.2 | 2.5 | 100 | ||||||
| 5.0 x 3.2 x 1.2 | 2.5 | 25 |
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Videos & Training
IDT Timing Solutions for NXP QorIQ / Layerscape CPU
IDT provides a brief overview of the timing solutions optimized for various configurations using the NXP (Freescale) QorIQ / Layerscape processors.
Presented by Ron Wade, PCI Express timing expert. For more information about IDT's timing solutions, visit www.IDT.com/go/clocks.
TRANSCRIPT
So, hi there, this is Ron Wade again and we're going to be talking about timing solutions that IDT has for NXP's QorIQ and Layerscape CPU. And in the middle here, what I've drawn, in the middle of the box here, is what I refer to as our all-in-one solutions. These are single chips that may have all the clocks you need to build your system around the NXP CPUs. So, the three parts I have listed here are the 6P49V205, the 5P49V5907, and 5P49V5908. These provide a mix of the clocks that were needed over here for the CPU cores and SerDes clocks, and they're all on a single chip. If these suit your needs, these are ideal, these are the smallest core footprint parts to use.
The other approach besides all-in-one is the building block approach, and I'm going to start over here on the left side with the CPU clocks and the memory controller. For this solution over here, we have the 5P49V5901, or it could be a 6901, depending on your requirements. And, this guy has the most flexibility as far as programming up any combination of DDR clock or CPU clock that you want, as well as the 24 MHz USB clock and a 125 MHz clock.
If you're using the Layerscape CPU with the reduced oscillator mode where you have the 100 MHz non-spread clock coming in, you might want to consider the 9FGV0 series or the 9FGL0 series. These are very high-performance PCI Express clock generators, the V being a 1.8 volt part and the L being a 3.3 volt part that are available. The terminations are integrated, they're very low power and they also have some extra copies in case SerDes is a PCI Express SerDes. So, this is the ideal solution if you want to go building block over here.
And then for the SerDes clocks, we've got the 125 MHz differential for Gigabit Ethernet, the 156 MHz for 10 gig, and the 100 MHz for PCIe. We have again a different set of flavors we can go with. We have the 5P49V6901, which is a better performing, lower phase jitter version of the 5901 over here. This guy's ideal if you have a mix of these SerDes frequencies in your design. If you're in a homogeneous environment, for instance, where everything's PCI Express or everything is 125 MHz, then you could use the 9FGV parts, or I'll use an output from over there, over on this side for the 100 MHz output, or you could use these guys programmed up to be 125 as well. Or if you've got a 125 coming from over there, you can use one of the 9DVD buffers which are the 1.8V buffers to fan that out. Likewise, we have similar parts with 3.3-volt power supplies, if that's what you prefer. The 9FGL0 series, it should give you the 100 to the 125, and the 9DVL0 series which can provide a fanout buffer for any of these three frequencies.
So, that's an overview of the timing solutions for NXP's QorIQ and Layerscape CPUs. This is Ron Wade at IDT again. Thanks for watching and see you next time.
Video List
