Overview
Description
The 71V124 3.3V CMOS SRAM is organized as 128K x 8. The JEDEC center power/GND pinout reduces noise generation and improves system performance. All bidirectional inputs and outputs of the 71V124 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation.
Features
- JEDEC revolutionary pinout (center power/GND) for reduced noise
- Equal access and cycle times
- Commercial: 10/12/15/20ns
- Industrial: 10/12/15/20ns
- One Chip Select plus one Output Enable pin
- Inputs and outputs are LVTTL-compatible
- Single 3.3V supply
- Low power consumption via chip deselect
- Available in 32-pin 300-mil and 400-mil plastic SOJ, and 32-pin Type II TSOP packages
Comparison
Applications
Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
Processing table
Pkg. Type |
Lead Count (#) |
Temp. Grade |
Pb (Lead) Free |
Carrier Type |
Moisture Sensitivity Level (MSL) |
Price (USD) | 1ku |
Buy / Sample |
|
|---|---|---|---|---|---|---|---|---|
| Part Number | ||||||||
| SOJ | 32 | C | Yes | Tube | 3 | Get Samples, | ||
| SOJ | 32 | C | Yes | Reel | 3 | 2.252 | ||
| SOJ | 32 | I | Yes | Reel | 3 | |||
| SOJ | 32 | C | Yes | Tube | 3 | 2.739 | Get Samples, | |
| SOJ | 32 | C | Yes | Reel | 3 | |||
| SOJ | 32 | I | Yes | Reel | 3 | 2.353 |
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