概要

The 7282 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
7282 - Block Diagram
7282 - Block Diagram
  • Equivalent to two 7202 1K x 9 FIFOs
  • Asynchronous and simultaneous read and write
  • Status Flags: Empty, Half-Full, Full
  • Auto-retransmit capability
  • Available in 56 pin TSSOP
  • Industrial temperature range (–40C to +85C) is available

ドキュメント

設計・開発

ECADモデル

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ECADモデルを調べる
Diagram of ECAD Models

製品選択

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    Moisture Sensitivity Level (MSL)
    ご購入 / サンプル
    型名
    7282L12PAG8
    circleアクティブ
    memory
    view_in_ar
    		TSSOP 56 C Yes Reel 1
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