概要
説明
The CD4028BMS types are BCD-to-decimal or binary-to-octal decoders consisting of buffering on all four inputs, decoding logic gates, and 10 output buffers. A BCD code applied to the four inputs, A to D, results in a high level at the selected one of 10 decimal decoded outputs. Similarly, a 3-bit binary code applied to inputs A through C is decoded in octal code at output 0 to 7 if D = 0. High drive capability is provided at all outputs to enhance dc and dynamic performance in high fan-out applications. The CD4028BMS is supplied in these 16-lead outline packages: Braze Seal DIP H4S, Frit Seal DIP H1E and Ceramic Flatpack H3X.
特長
- High-voltage type (20V rating)
- BCD-to-decimal decoding or binary-to-octal decoding
- High decoded output drive capability
- "Positive Logic" inputs and outputs - Decoded outputs go high on selection
- Medium-speed operation: tPHL, tPLH = 80ns (typ) at VDD = 10V
- Standardized symmetrical output characteristics
- 100% tested for quiescent current at 20V
- Maximum input current of 1µA at 18V over full package temperature range: 100nA at 18V and +25 °C
- Noise margin (over full package temperature range): 1V at VDD = 5V, 2V at VDD = 10V, 2.5V at VDD = 15V
- 5V, 10V and 15V parametric ratings
- Meets all requirements of JEDEC tentative standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
製品比較
アプリケーション
- Code conversion
- Indication-Tube decoder
- Address decoding - Memory selection control
ドキュメント
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| 分類 | タイトル | 日時 |
| データシート | PDF 408 KB | |
| カタログ | PDF 5.02 MB | |
| カタログ | PDF 467 KB | |
| Price Increase Notice | PDF 360 KB | |
| その他資料 | ||
| Product Advisory | PDF 499 KB | |
| 製品変更通知 | PDF 230 KB | |
| アプリケーションノート | PDF 338 KB | |
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Processing table
| CFP | Tray | 25 | 5962R9663001VXC |
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