概要
説明
The IDT9179-03 generates low skew clock buffers required for high speed RISC or CISC microprocessor systems such as Intel PentiumPro. Outputs will handle up to 133MHz clocks. An output enable is provided for testability. The device is a buffer with low output to output skew. This is a Fanout buffer device, not using an internal PLL. This buffer can also be a feedback to an external PLL stage for phase synchronization to a master clock. There are a total of ten outputs, sufficient for feedback to a PLL source and to drive four small outline DIMM modules (S.O. DIMM) at 2 clocks each. Or a total of ten outputs as a Fanout buffer from a common clock source. The individual clock outputs are addressable through I2C to be enabled, or stopped in a low state for reduced EMI when the lines are not needed.
特長
製品比較
アプリケーション
設計・開発
モデル
ECADモデル
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Processing table
| SSOP | 28 | C | Yes | Tube | ||
| SSOP | 28 | C | Yes | Reel |
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