概要
説明
The IDT ADC demo board is suitable for dynamic performance evaluations from low to high IF configuration. The FPGA eases the evaluation and analysis of the ADC dynamic and enables use of the full JESD204B feature set.
特長
- SMA connector for clock and analog input signals
- On board ARRIA II GX FPGA for JESD204B data acquisition
- Single power supply (on-board regulators)
アプリケーション
ドキュメント
ピックアップ
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| 分類 | タイトル | 日時 |
| マニュアル－ハードウェア | PDF 1.80 MB | |
| マニュアル－ソフトウェア | ZIP 4.59 MB | |
| 回路図 | PDF 4.20 MB | |
3件
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Processing table
ADC1443D125W1-DB 廃止品 |
BD0 | BOARD | 0 | I | No |
Tips for Using This Parametric Table:
- Hide Filters button in header: Collapse or expands filters
- Column sort buttons in header: Sort Column alphabetically / numerically descending or ascending
- Reset button in header: Reset all filters to the page default
- Full Screen button in header: Expand the table to full screen view (user must close out of full screen before they can interact with rest of page)
- Export button in header: Export the filtered results of the table to an Excel document
- Filter parts search bar in header: Type to filter table results by part number
- Hide column button in column headers: Select to hide columns in table
- AND / OR toggle switches in header: Toggles the logic of this particular filter to be “AND” or “OR” logic for filtering results
- Multiselect checkboxes at beginning of each row in table: Select these checkboxes to compare products against each other
- Document icon next to product name in row: View the featured document for this product
- Chip icon next to the right of the document icon in row: View the block diagram for this product
- Cart icon to the right of the chip icon: Indicates that samples are available for this product