概要
説明
The 72V851 is an 8K x 9 dual synchronous FIFO that is functionally equivalent to two 72V251 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each FIFO has a 9-bit input and output data port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronously of one another for dual clock operation.
特長
- Offers the optimal combination of capacity, speed, and design flexibility in a small footprint
- Ideal for prioritization, bidirectional, and width expansion applications
- 10ns read/write cycle time
- 5V input tolerant
- Separate control lines and data lines for each FIFO
- Separate Empty, Full, programmable Almost-Empty and Almost-Full flags for each FIFO
- Enable puts output data lines in a high-impedance state
- Available in 64-pin TQFP and STQFP packages
- Industrial temperature range (–40 °C to +85 °C) is available
製品比較
アプリケーション
設計・開発
モデル
ECADモデル
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Processing table
Pkg. Type |
Lead Count (#) |
Temp. Grade |
Pb (Lead) Free |
Carrier Type |
Moisture Sensitivity Level (MSL) |
Price (USD) | 1ku |
ご購入 / サンプル |
|
|---|---|---|---|---|---|---|---|---|
| 型名 | ||||||||
| TQFP | 64 | C | Yes | Tray | 3 | 58.84 | サンプルを入手, |
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