Overview
Description
The RC38108 is a high-performance, small form factor, low-power jitter attenuator, multi-frequency clock synthesizer, and digitally controlled oscillator (DCO) designed for critical applications such as 4G/5G RF transceivers and high-speed SerDes. It belongs to Renesas' high-performance FemtoClock™ 3 wireless family. It generates clocks with ultra-low in-band phase noise and spurious signals, achieving jitter below 18fs RMS, making it ideal for 112Gbps and 224Gbps SerDes. The RC38108 can manage up to three synchronization domains, supporting CPRI/eCPRI and synchronization methods like IEEE 1588, Synchronous Ethernet (SyncE), GPI, or GNSS. With up to four frequency domains, it simplifies system clock generation, while integrated LDOs provide superior PSRR, reducing PCB complexity. This makes it an excellent choice for applications such as timing for optical front-end DAC/ADC and DSP, reference clocks for high-speed SerDes, 5G distribution units, and high-performance DCO for PTP-based clocks.
Features
- Ultra-low phase noise synthesizer: Jitter below 18fs RMS from 12kHz to 20MHz with a 4MHz high-pass filter (HPF)
- Independent synchronization domains: Two independent low phase noise synchronization domains
- Frequency domains: Four independent low phase noise frequency domains
- Clock outputs: Eight clock outputs with independent integer dividers
- Six outputs configurable as LVDS, HCSL (AC-LVPECL), or CML
- Two outputs configurable as LVDS, HCSL (AC-LVPECL), or LVCMOS
- Output frequency range
- CML: DC to 2.5GHz
- LVDS or HCSL: DC to 1GHz
- LVCMOS: DC to 250MHz
- Clock inputs: Two differential clock inputs configurable as four single-ended inputs
- Power requirements
- Operates from a 1.8V supply
- Clock inputs tolerate a 1.8V input when the device is powered off, sinking less than 1mA
- Input frequency range: CLKIN input frequency range: DC to 1GHz
- Time sync TDC: Supports 1PPS (one pulse per second) and PP2S inputs
- Digital phase-locked loops (DPLLs)
- Comply with ITU-T G.8262 and G.8262.1
- Input-to-output phase variation ≤ 100ps
- Digitally controlled oscillator (DCO): Frequency resolution < 10^-13
- Physical package: 7mm × 7mm, 64-pin BGA
Comparison
Applications
Applications
- Timing for optical front-end DAC/ADC and DSP
- Reference clock for 112Gbps and 224Gbps SerDes
- 5G distribution units (DU), switches, and routers
- High-performance DCO for precision time protocol (PTP) based clocks
Design & Development
Software & Tools
Software & Tools
| Software title
|
Software type
|
Company
|
|---|---|---|
| Renesas IC Toolbox (RICBox) The Renesas IC Toolbox (RICBox) software platform enables customers to configure Renesas devices on evaluation kits when attached to the computer running the software.
|
Software Package | Renesas |
1 item
|
||
Boards & Kits
Boards & Kits
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
| Yes | HCSL, LVCMOS, LVDS | 4 | CML, Crystal, HCSL, LVCMOS, LVDS, LVPECL | 8 | 7.0 x 7.0 x 1.09 | CABGA | Tray | Get Samples, | |
| Yes | HCSL, LVCMOS, LVDS | 4 | CML, Crystal, HCSL, LVCMOS, LVDS, LVPECL | 8 | 7.0 x 7.0 x 1.09 | CABGA | Tray | Get Samples, | |
| Yes | HCSL, LVCMOS, LVDS | 4 | CML, Crystal, HCSL, LVCMOS, LVDS, LVPECL | 8 | 7.0 x 7.0 x 1.09 | CABGA | Reel | ||
| Yes | HCSL, LVCMOS, LVDS | 4 | CML, Crystal, HCSL, LVCMOS, LVDS, LVPECL | 8 | 7.0 x 7.0 x 1.09 | CABGA | Reel |
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Videos & Training
FemtoClock™ 3 Wireless is an industry-leading, ultra-low phase noise synchronizer and jitter attenuator for 5G distribution units (DU), switches, and routers. RC38312 and RC38112 are designed for 5G and 5G-A BTS radio unit designs.
News & Blog Posts
| Blog Post | Oct 8, 2024 | ||
| Blog Post | Apr 27, 2021 |
