概要
説明
The 9DB1904 is electrically compatible to the Intel DB1900GS Differential Buffer Specification. This buffer provides 19-Output clocks for PCI-Express Gen2 or Intel QPI applications. A differential clock from a CK410B+ main clock generator, such as the 932S421 drives the 9DB1904. The 9DB1904 can provide outputs up to 400 MHz in Bypass Mode.
特長
- 19- 0.7 V HCSL differential output pairs
- Phase jitter: PCIe Gen2 < 3.1 ps rms
- Phase jitter: PCIe Gen1 < 86 ps peak to peak
- Supports zero delay buffer mode and fanout mode
- Bandwidth programming available
- 8 selectable SMBus addresses for easy system expansion 90-147 MHz operation in PLL mode
- 33-400 MHz operation in Bypass mode
製品比較
アプリケーション
設計・開発
モデル
ECADモデル
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Processing table
| VFQFPN | 72 | C | Yes | Tray | ||
| VFQFPN | 72 | C | Yes | Reel |
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ビデオ&トレーニング
PCIe Clocking Architectures (Common and Separate)
This is the first video in our PCIe series. In this video, we define PCIe architectures, focusing on common and separate clock architectures. Watch the rest of the video series below where Ron will cover the impact of different timing architectures.
Watch the Video Series Below
Video List
