概要

The 9DB833 zero delay buffer (ZDB) supports PCIe Gen3 requirements while being backward compatible with PCIe Gen2 and Gen1. The 9DB833 is driven by a differential SRC output pair from a 932S421 or 932SQ420 or equivalent main clock generator.

9DB833 - Block Diagram
9DB833 - Pinout
9DB833 - Block Diagram
9DB833 - Pinout
  • Eight 0.7V HCSL differential output pairs
  • Phase jitter: PCIe Gen3 < 1ps rms
  • Phase jitter: PCIe Gen2 < 3.1ps rms
  • Phase jitter: PCIe Gen1 < 86ps peak-to-peak
  • Supports Zero Delay Buffer mode and Fanout mode
  • Bandwidth programming available
  • 3 selectable SMBus Addresses
  • 50MHz to 110MHz operation in PLL mode
  • 5MHz to 166MHz operation in Bypass mode

ドキュメント

設計・開発

ECADモデル

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ECADモデルを調べる
Diagram of ECAD Models

製品選択

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    Moisture Sensitivity Level (MSL)
    Price (USD) | 1ku
    ご購入 / サンプル
    型名
    9DB833AGILF
    circleアクティブ
    memory
    view_in_ar
    サンプル入手可能
    今すぐ購入する
    		TSSOP 48 I Yes Tube 1 サンプルを入手,
    9DB833AGILFT
    circleアクティブ
    memory
    view_in_ar
    		TSSOP 48 I Yes Reel 1
    9DB833AGLF
    circleアクティブ
    memory
    view_in_ar
    サンプル入手可能
    今すぐ購入する
    		TSSOP 48 C Yes Tube 1 サンプルを入手,
    9DB833AGLFT
    circleアクティブ
    memory
    view_in_ar
    		TSSOP 48 C Yes Reel 1
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    ビデオ&トレーニング

    PCIe Clocking Architectures (Common and Separate)

    This is the first video in our PCIe series. In this video, we define PCIe architectures, focusing on common and separate clock architectures. Watch the rest of the video series below where Ron will cover the impact of different timing architectures.

    Watch the Video Series Below

    Video List
    PCIe Clocking Architectures (Common and Separate)
    PCIe Common Clock Architecture and its Impact on Clocking
    PCIe Separate Reference without Spread Clock Architecture
    PCIe Separate Reference Clock With Independent Spread (SRIS) Architecture Overview
    Choosing the PLL Bandwidth for Zero Delay Buffers in PCIe Timing Systems

    ニュース＆ブログ

    ブログ 2022年4月14日
    ブログ 2018年5月22日
    ニュース 2018年4月30日