概要

The 72V05 is an 8K x 9 dual-port First-In, First-Out (FIFO) that operates at Vcc between 3.0V and 3.6V. The device will load and empty data on a first-in/first-out basis. It uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for resetting the read pointer to its initial position when RT is pulsed LOW. It is designed for applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.

72V05 - Block Diagram
72V05 - Block Diagram
  • Functionally compatible with the 720x family
  • Low-power consumption
  • 15ns access time
  • Asynchronous and simultaneous read and write
  • Fully expandable by both word depth and/or bit width
  • Status flags: Empty, Half-Full, Full
  • Auto-retransmit capability
  • Available in a 32-pin PLCC package
  • Industrial temperature range (–40 °C to +85 °C) is available

ドキュメント

設計・開発

ECADモデル

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ECADモデルを調べる
Diagram of ECAD Models

製品選択

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    Moisture Sensitivity Level (MSL)
    Price (USD) | 1ku
    ご購入 / サンプル
    型名
    72V05L15JG
    circleアクティブ
    memory
    view_in_ar
    サンプル入手可能
    今すぐ購入する
    		PLCC 32 C Yes Tube 3 サンプルを入手,
    72V05L25JGI
    circleアクティブ
    memory
    view_in_ar
    サンプル入手可能
    今すぐ購入する
    		PLCC 32 I Yes Tube 3 23.41 サンプルを入手,
    72V05L25JGI8
    circleアクティブ
    memory
    view_in_ar
    		PLCC 32 I Yes Reel 3 22.13
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