概要

The 2510C is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the CLKIN signal with the CLKOUT signal. It is specifically designed for use with synchronous SDRAMs. The 2510C operates at 3.3V VCC and drives up to ten clock loads.

  • Meets or exceeds PC133 registered DIMM specification1.1
  • Spread Spectrum Clock Compatible
  • Distributes one clock input to one bank of ten outputs
  • Operating frequency 25MHz to 175MHz
  • External feedback input (FBIN) terminal is used to synchronize the outputs to the clock input
  • No external RC network required
  • Operates at 3.3V Vcc
  • Plastic 24-pin 173mil TSSOP package
     

ドキュメント

= ピックアップ
分類 タイトル 日時
データシート
2510C Datasheet
PDF 214 KB
製品変更通知
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly
PDF 611 KB
製品変更通知
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly
PDF 611 KB
製品変更通知
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages
PDF 95 KB
製品変更通知
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages
PDF 50 KB
製品変更通知
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products
PDF 361 KB
6件

設計・開発

ECADモデル

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ECADモデルを調べる
Diagram of ECAD Models

製品選択

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    Moisture Sensitivity Level (MSL)
    ご購入 / サンプル
    型名
    2510CGLF
    circleアクティブ
    memory
    view_in_ar
    サンプル入手可能
    		 TSSOP 24 C Yes Tube 1 サンプルを入手,
    2510CGLFT
    circleアクティブ
    memory
    view_in_ar
    サンプル入手可能
    		 TSSOP 24 C Yes Reel 1 サンプルを入手,
    Parametric Table tips

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