概要
説明
This FET has the over temperature shut-down capability sensing to the junction temperature. This FET has the built-in over temperature shut-down circuit in the gate area. And this circuit operation to shut-down the gate voltage in case of high junction temperature like applying over power consumption, over current etc. .
特長
- Logic level operation.
- Built-in the over temperature shut-down circuit.
- High endurance capability against to the short circuit.
- Latch type shut down operation (need 0 voltage recovery).
- Built-in the current limitation circuit.
- Power supply voltage applies 12 V.
- AEC-Q101 Compliant
製品比較
アプリケーション
設計・開発
モデル
ECADモデル
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Processing table
| LDPAK(S)-(1) | TO-263 / D2PAK | Embossed Tape | 1 | 2.149 | サンプルを入手, |
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