Evaluation Board Kit for RZ/N2H
The Evaluation Board Kit for RZ/N2H is an evaluation and development kit for the RZ/N2H MPU. Since it has an on-board emulator, you can start evaluation by simply...
Featured Documents:
Overview
Description
RZ/N2H is an advanced high-end MPU that provides high-speed and real-time operation with sophisticated network functionality supporting controller and device industrial Ethernet, meeting the requirements of programmable logic controllers (PLCs) and motion controllers. It has the processing power and peripheral functions required for controllers such as industrial robots, motion controllers, and PLCs. Quad Arm® Cortex®-A55 CPU cores (1200MHz) for application processing and two Arm Cortex-R52 CPU cores (1000MHz) for real-time control, as well as network functions compatible with Time-Sensitive Networking (TSN) and various industrial Ethernet protocols such as EtherCAT, EtherNet/IP, and PROFINET RT/IRT. Equipped with 3 GMACs and enables multiple networks simultaneously. Equipped with a large-capacity memory interface of LPDDR4, and a large-capacity non-volatile memory interface of SD/eMMC, it supports application-rich operating systems such as Linux. Two lanes of PCIe Gen3, 2 channels of xSPI, and other high-speed interfaces are also available. Multi-axis motor control can be achieved with a single chip, reducing the number of BOM components, thus contributing to reduced power consumption and board size.
Features
- CPU: Arm Quad Cortex-A55, maximum operating frequency 1200MHz
- CPU: Arm Dual Cortex-R52, maximum operating frequency 1000MHz
- Memory: Tightly coupled memory 576KB (with ECC) per R52 core, internal RAM 2MB (with ECC)
- LPDDR4 SDRAM memory interface
- Trigonometric function accelerator
- 3-port Gigabit Ethernet switch with TSN and 3unit Ethernet GMAC
- Industrial Ethernet: EtherCAT®, PROFINET® RT/IRT, EtherNet/IP™, etc.
- Encoder interface: 14ch (supports A-format™, EnDat, BiSS®, HIPERFACE® DSL, FA-CODER）
- Up to 6-axis motor control
- Octa/Quad SPI support
- ADC: 12-bit x 3 units
- ΔΣ I/F: 23ch
- Package: 576-pin FCBGA
- Voltage: 0.8V core, 1.1V DDR 1.8V PLL, OSC, USB I/O 3.3V GPIO, xSPI, RMII, MII
Comparison
Applications
- PLC
- Motion controller
- AGV/AMR
- Multi-axis servo
- CNC
- Ethernet switch
- Gateway
Design & Development
Software & Tools
Software & Tools
| Software title
|
Software type
|
Company
|
|---|---|---|
| e² studio - information for RZ Family Eclipse-based Renesas integrated development environment (IDE).
|
IDE and Coding Tool | Renesas |
| Security Key Management Tool Key wrapping tool for key management systems using Renesas security IP. Enables secure installation and update of user application and device lifecycle management (DLM) keys.
|
Solution Toolkit | Renesas |
| RZ/T2H and RZ/N2H Linux Software Package [V5.10-CIP] Linux software packages for RZ/T2H and RZ/N2H Groups.
|
Software Package | Renesas |
| RZ/T and RZ/N Multi-OS Package The RZ/T Multi-OS Package Package and RZ/N Multi-OS Package are software packages for developing multi-OS solutions.
|
Software Package | Renesas |
| RZ MPU Security Package (Linux OS) Security Package for RZ MPUs. This package is used in combination with the Linux package provided for each device.
|
Software Package | Renesas |
| RZ Smart Configurator RZ Smart Configurator is a utility for combining software in ways that meet your needs. It simplifies the embedding of Renesas drivers in your systems through supports for importing middleware and drivers and configuring pins.
|
Solution Toolkit | Renesas |
6 items
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Sample Code
Boards & Kits
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.
Processing table
| RZ/N | Cortex-A55 x 4 | 1200 | 64 | Cortex-R52 x 2 | 2048 | LPDDR4-3200 | No | No | 2ch), PCIe(Gen3 | 0 | 10/100M/1G x 4 ch | USB2.0 x 1 ch (1H/F/OTG) | 287 | FBGA | 576 | Tj = -40 to +125°C | N/A | 0 | Yes | Yes | 16-bit x 6-ch, 16-bit x 8-ch, 32-bit x 1-ch, 32-bit x 2-ch, 32-bit x 56-ch | 12bit x 23-ch | Display Function | 3.135 - 3.465 | Cortex-A55 x4 + Cortex-R52 x2 | 3 | |||
| RZ/N | Cortex-A55 x 2 | 1200 | 64 | Cortex-R52 x 2 | 2048 | LPDDR4-3200 | No | No | 2ch), PCIe(Gen3 | 0 | 10/100M/1G x 4 ch | USB2.0 x 1 ch (1H/F/OTG) | 287 | FBGA | 576 | Tj = -40 to +125°C | N/A | 0 | Yes | Yes | 16-bit x 6-ch, 16-bit x 8-ch, 32-bit x 1-ch, 32-bit x 2-ch, 32-bit x 56-ch | 12bit x 23-ch | Display Function | 3.135 - 3.465 | Cortex-A55 x2 + Cortex-R52 x2 | 3 | |||
| RZ/N | Cortex-A55 | 1200 | 64 | Cortex-R52 x 2 | 2048 | LPDDR4-3200 | No | No | 2ch), PCIe(Gen3 | 0 | 10/100M/1G x 4 ch | USB2.0 x 1 ch (1H/F/OTG) | 287 | FBGA | 576 | Tj = -40 to +125°C | N/A | 0 | Yes | Yes | 16-bit x 6-ch, 16-bit x 8-ch, 32-bit x 1-ch, 32-bit x 2-ch, 32-bit x 56-ch | 12bit x 23-ch | Display Function | 3.135 - 3.465 | Cortex-A55 x2 + Cortex-R52 x2 | 3 | |||
| RZ/N | Cortex-A55 x 4 | 1200 | 64 | Cortex-R52 x 2 | 2048 | LPDDR4-3200 | No | No | 2ch), PCIe(Gen3 | 0 | 10/100M/1G x 4 ch | USB2.0 x 1 ch (1H/F/OTG) | 287 | FBGA | 576 | Tj = -40 to +125°C | N/A | 0 | Yes | Yes | 16-bit x 6-ch, 16-bit x 8-ch, 32-bit x 1-ch, 32-bit x 2-ch, 32-bit x 56-ch | 12bit x 23-ch | Display Function | 3.135 - 3.465 | Cortex-A55 x4 + Cortex-R52 x2 | 3 | |||
| RZ/N | Cortex-A55 x 2 | 1200 | 64 | Cortex-R52 x 2 | 2048 | LPDDR4-3200 | No | No | 2ch), PCIe(Gen3 | 0 | 10/100M/1G x 4 ch | USB2.0 x 1 ch (1H/F/OTG) | 287 | FBGA | 576 | Tj = -40 to +125°C | N/A | 0 | Yes | Yes | 16-bit x 6-ch, 16-bit x 8-ch, 32-bit x 1-ch, 32-bit x 2-ch, 32-bit x 56-ch | 12bit x 23-ch | Display Function | 3.135 - 3.465 | Cortex-A55 x2 + Cortex-R52 x2 | 3 | |||
| RZ/N | Cortex-A55 | 1200 | 64 | Cortex-R52 x 2 | 2048 | LPDDR4-3200 | No | No | 2ch), PCIe(Gen3 | 0 | 10/100M/1G x 4 ch | USB2.0 x 1 ch (1H/F/OTG) | 287 | FBGA | 576 | Tj = -40 to +125°C | N/A | 0 | Yes | Yes | 16-bit x 6-ch, 16-bit x 8-ch, 32-bit x 1-ch, 32-bit x 2-ch, 32-bit x 56-ch | 12bit x 23-ch | Display Function | 3.135 - 3.465 | Cortex-A55 x1 + Cortex-R52 x2 | 3 | |||
| RZ/N | Cortex-A55 x 4 | 1200 | 64 | Cortex-R52 x 2 | 2048 | LPDDR4-3200 | No | No | 2ch), PCIe(Gen3 | 0 | 10/100M/1G x 4 ch | USB2.0 x 1 ch (1H/F/OTG) | 287 | FBGA | 576 | Tj = -40 to +125°C | N/A | 0 | Yes | Yes | 16-bit x 6-ch, 16-bit x 8-ch, 32-bit x 1-ch, 32-bit x 2-ch, 32-bit x 56-ch | 12bit x 23-ch | Display Function | 3.135 - 3.465 | Cortex-A55 x4 + Cortex-R52 x2 | 3 | Get Samples, |
Tips for Using This Parametric Table:
- Hide Filters button in header: Collapse or expands filters
- Column sort buttons in header: Sort Column alphabetically / numerically descending or ascending
- Reset button in header: Reset all filters to the page default
- Full Screen button in header: Expand the table to full screen view (user must close out of full screen before they can interact with rest of page)
- Export button in header: Export the filtered results of the table to an Excel document
- Filter parts search bar in header: Type to filter table results by part number
- Hide column button in column headers: Select to hide columns in table
- AND / OR toggle switches in header: Toggles the logic of this particular filter to be “AND” or “OR” logic for filtering results
- Multiselect checkboxes at beginning of each row in table: Select these checkboxes to compare products against each other
- Document icon next to product name in row: View the featured document for this product
- Chip icon next to the right of the document icon in row: View the block diagram for this product
- Cart icon to the right of the chip icon: Indicates that samples are available for this product
Videos & Training
RZ/T RZ/N FSP Tutorial for FSP Configuration (1/2) - Introduction of Tabs
This video provides an overview of all the tabs in the FSP Configuration, except for the [Pin] tab, which is covered in the Pin Configuration Function video.
Chapter's Title
00:10 Overview
00:44 Introduction of Summary Tab
01:22 Introduction of Bsp Tab
03:39 Introduction of Clocks Tab
04:52 Introduction of Stacks Tab
05:42 Introduction of Interrupts Tab
06:30 Introduction of Event Links Tab
07:13 Introduction of Components Tab
Related Resources
FSP Links
Board Links
User's Manual links
Video Link
Video List
