概要
説明
The 74ALVCH16260 12-bit to 24-bit multiplexed D-type latch is used in applications in which two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical applications include multiplexing and/or demultiplexing address and data information in microprocessor or bus-interface applications. This device also is useful in memory interleaving applications. The 74ALVCH16260 has "bus-hold" which prevents floating inputs and eliminates the need for pull-up/down resistors. The 74ALVCH16260 operates at -40C to +85C
特長
- Typical tSK(o) (Output Skew) < 250ps
- ESD > 2000V per MIL-STD-883, Method 3015
- > 200V using
- machine model (C = 200pF, R = 0)
- VCC = 3.3V ± 0.3V, Normal Range
- VCC = 2.7V to 3.6V, Extended Range
- VCC = 2.5V ± 0.2V
- CMOS power levels (0.4 uW typ. static)
- Rail-to-Rail output swing for increased noise margin
- High Output Drivers: ±24mA
- Available in 56 pin TSSOP package
製品比較
アプリケーション
設計・開発
モデル
ECADモデル
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Processing table
| TSSOP | 56 | C | Yes | Tube | ||
| TSSOP | 56 | C | Yes | Reel |
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