概要
説明
The KAD5512P is the low-power member of the KAD5512 family of 12-bit analog-to-digital converters. Designed with Intersil’s proprietary FemtoCharge™ technology on a standard CMOS process, the family supports sampling rates of up to 250MSPS. The KAD5512P is part of a pin-compatible portfolio of 10, 12 and 14-bit A/Ds with sample rates ranging from 125MSPS to 500MSPS. A Serial Peripheral Interface (SPI) port allows for extensive configurability, as well as fine control of various parameters such as gain and offset. Digital output data is presented in selectable LVDS or CMOS formats. The KAD5512P is available in 72 Ld and 48 Ld QFN packages with an exposed paddle. Operating from a 1. 8V supply, performance is specified over the full industrial temperature range (-40°C to +85°C).
特長
- Half the power of the pin-compatible KAD5512HP family
- 1.5GHz analog input bandwidth
- 60fs clock jitter
- Programmable gain, offset and skew control
- Over-range indicator
- Selectable clock divider: ÷1, ÷2 or ÷4
- Clock phase selection
- Nap and sleep modes
- Two's complement, gray code or binary data format
- SDR/DDR LVDS-compatible or LVCMOS outputs
- Programmable built-in test patterns
- Single-supply 1.8V operation
- Pb-free (RoHS compliant)
- SNR = 66.1dBFS for fIN = 105MHz (-1dBFS)
- SFDR = 87dBc for fIN = 105MHz (-1dBFS)
- Total Power Consumption
- 267/219mW at 250/125MSPS (SDR Mode)
- 234/189mW at 250/125MSPS (DDR Mode)
製品比較
アプリケーション
アプリケーション
- Power Amplifier Linearization
- Radar and Satellite Antenna Array Processing
- Broadband Communications
- High-Performance Data Acquisition
- Communications Test Equipment
- WiMAX and Microwave Receivers
ドキュメント
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| 分類 | タイトル | 日時 |
| データシート | PDF 1.75 MB | |
| カタログ | PDF 5.67 MB 英語 | |
| 製品変更通知 | PDF 301 KB | |
| ガイド | PDF 1.02 MB | |
| マニュアル－開発ツール | PDF 509 KB | |
| マニュアル－開発ツール | PDF 760 KB | |
| アプリケーションノート | PDF 503 KB | |
| アプリケーションノート | PDF 1.08 MB | |
| アプリケーションノート | PDF 287 KB | |
9件
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設計・開発
ソフトウェア／ツール
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| QFN | Tray | 3 | 70.93 | サンプルを入手, |
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