概要

The HXR45100 is an extension of the low-power, single-ended input, single-channel linear Trans-Impedance Amplifier (TIA) of HXR44100, and a member of the Optical Receiver Transmitter Array (ORTA) product family. Together with a PIN detector, the HXR45100 can be used to design a compact linear Receiver Optical Sub-Assembly (ROSA) for the next-generation 400G optical transceivers with advanced modulation schemes in 53Gbaud PAM4 data rates.

This TIA operates in a 3.3V supply or a 2.9V supply for low power consumption, providing exceptionally low input referred noise density, wide input optical power range, excellent linearity up to 3mA overload, and a high bandwidth. The chip is designed with the patented adaptive biasing scheme.

HXR45100 - Block Diagram
HXR45100 - Block Diagram
  • High receiver sensitivity for 112Gbps PAM4 Ethernet applications
  • Low power mode in 56GBaud applications 
  • Power consumption as low as 175mW/ch 
  • Industrial operating temperature range from -40 °C to 95 °C
  • Up to 5kΩ typical differential gain
  • Wide adjustable output voltage swing
  • Linear operation up to 3mAppSE overload with all internal AGC
  • Up to 43GHz typical bandwidth
  • 10pA/√Hz input-referred current noise density
  • RSSI, LOS, and Rx disable functions  
  • 100G Lambda MSA and IEEE 802.3cd compliance

ドキュメント

= ピックアップ
分類 タイトル 日時
データシート－簡略版
HXR45100 Short-Form Datasheet
PDF 179 KB
データシート
HXR45100 Datasheet
ログインしてダウンロード PDF 914 KB
製品変更通知
PCN# : 210015 Change of Waffle Pack Label Display
PDF 134 KB
EOL通知
PDN# : CQ-20-07 End-of-Life (EOL) Process on Select Part Numbers
PDF 717 KB
4件

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製品選択

    Processing table
    Pkg. Type
    Temp. Grade
    Carrier Type
    Moisture Sensitivity Level (MSL)
    ご購入 / サンプル
    型名
    HXR45100-DNJ
    circleアクティブ
    memory
    view_in_ar
    サンプル入手可能
    		 WAFER E WFP 0 サンプルを入手,
    HXR45100-EVB
    fast_forwardプレビュー
    memory
    view_in_ar
    サンプル入手可能
    		 BOARD C Box 0 サンプルを入手,
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