ルネサス エレクトロニクス株式会社 (Renesas Electronics Corporation)
検索

72255

アクティブ

8K x 18 SuperSync FIFO, 5.0V

ご購入
72255LA/72265LA Datasheet

概要

The 72255 is an 8K x 18 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. SuperSync FIFOs are particularly appropriate for networking, video, telecommunications, data communications and other applications that need to buffer large amounts of data.
72255 - Block Diagram
72255 - Block Diagram
  • 10ns read/write cycle time (8ns access time)
  • Fixed, low first word data latency time
  • Auto power down minimizes standby power consumption
  • Retransmit operation with fixed, low first word data latency time
  • Empty, Full and Half-Full flags signal FIFO status
  • Programmable Almost-Empty and Almost-Full flags
  • Easily expandable in depth and width
  • Independent Read and Write clocks (permit reading and writing simultaneously)
  • Available in 64-pin TQFP and STQFP packages
  • Industrial temperature range (–40C to +85C) is available

ドキュメント

設計・開発

ECADモデル

[製品選択]テーブル内の製品名をクリックするとSamacSysが提供する回路図シンボル、PCBフットプリント、3D CADモデルがご確認いただけます。 お探しのシンボルやモデルが見つからない場合、Webサイトから直接リクエストできます。

ECADモデルを調べる
Diagram of ECAD Models