概要
説明
The 4DB0124K is a DDR4 Data Buffer with a dual 4-bit bidirectional data register with differential strobes is designed for 1.2 VDD operation.
特長
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Pinout optimized DDR4 LRDIMM PCB layout
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DDR4-1600/1866/2133
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Supports CKE Power Down operation mode
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Provides access to internal control words for configuring the device features and adapting in different LRDIMM and system applications
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Available in 53-ball Fine-Pitch BGA (FPGA) with 0.50mm ball pitch, 14 x 5 Grid with 17 balls depopulated, 7.5mm x 3.0mm Package as defined in MO-276 (Issue F, Variation DA)
製品比較
アプリケーション
ドキュメント
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| 分類 | タイトル | 日時 |
| 概要 | PDF 515 KB | |
| EOL通知 | PDF 536 KB | |
| 製品変更通知 | PDF 32 KB | |
| ホワイトペーパー | PDF 1.08 MB | |
| 製品変更通知 | PDF 207 KB | |
| ホワイトペーパー | PDF 5.22 MB | |
6件
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設計・開発
モデル
ECADモデル
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| FCCSP | 53 | C | Yes | Tray |
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ビデオ&トレーニング
A white paper authored by IDT (acquired by Renesas) and Micron details research into memory and bandwidth for today's high-performance servers. LRDIMMS and RDIMMS traditionally have been seen as complementary, with the former targeting applications requiring deeper memory and the latter for applications requiring higher bandwidth.
The introduction of 8-gigabit DRAMS has resulted in a growing number of Internet applications benefiting from both deeper memories and higher bandwidth. This paper shows how 32 GB 2RX4 LRDIMMs transcend similar RDIMMs to meet the needs of today’s data center enterprise servers, by providing an optimal combination of deeper memory and higher data bandwidth, even at mainstream module densities.
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