High Speed A/D Converter Evaluation Kits
Renesas offers two options for evaluating high-speed analog-to-digital converter products with LVDS and/or LVCMOS outputs. A complete, turnkey evaluation platform is...
概要
説明
The KAD5512P-50 is a low-power, high performance, 12-bit, 500MSPS analog-to-digital converter designed with Intersil’s proprietary FemtoCharge™ technology on a standard CMOS process. The KAD5512P-50 is part of a pin-compatible portfolio of 10, 12 and 14-bit A/Ds with sample rates ranging from 125MSPS to 500MSPS. The device utilizes two time-interleaved 12-bit, 250MSPS A/D cores to achieve the ultimate sample rate of 500MSPS. A single 500MHz conversion clock is presented to the converter, and all interleave clocking is managed internally. A Serial Peripheral Interface (SPI) port allows for extensive configurability, as well as fine control of matching characteristics (gain, offset, skew) between the two converter cores. These adjustments allow the user to minimize spurs associated with the interleaving process. Digital output data is presented in selectable LVDS or CMOS formats. The KAD5512P-50 is available in a 72 Ld QFN package with an exposed paddle. Performance is specified across the full industrial temperature range (-40°C to +85°C).
特長
- Programmable gain, offset and skew control
- 1.3GHz analog input bandwidth
- 60fs clock jitter
- Over-range indicator
- Selectable clock divider: ÷1 or ÷2
- Clock phase selection
- Nap and sleep modes
- Two's complement, gray code or binary data format
- DDR LVDS-compatible or LVCMOS outputs
- Programmable built-in test patterns
- Single-supply 1.8V operation
- Pb-free (RoHS compliant)
- SNR = 65.9dBFS for fIN = 105MHz (-1dBFS)
- SFDR = 82.0dBc for fIN = 105MHz (-1dBFS)
- Total power consumption = 432mW
製品比較
アプリケーション
- Radar and Satellite Antenna Array Processing
- Broadband Communications
- High-Performance Data Acquisition
設計・開発
ソフトウェア／ツール
ボード＆キット
モデル
ECADモデル
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Processing table
KAD5512P-50Q72 アクティブ サンプル入手可能
今すぐ購入する
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QFN | Tray | 3 | 213.37 | サンプルを入手, |
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