概要

The 524S is a low skew, single input to four output, LVCMOS clock buffer that offers a best-in-class additive phase jitter of sub 50fs.

524S Block Diagram
524S Pinout - DFN
524S Pinout - SOIC
524S Block Diagram
524S Pinout - DFN
524S Pinout - SOIC
  • Low additive phase jitter RMS: 50fs
  • Extremely low skew outputs (50ps)
  • Low-cost clock buffer
  • Packaged in an 8-SOIC and 8-DFN, Pb-free
  • ICLK is PDT and may be driven before VDD is applied
  • Direct-coupled signal path suitable for 1pps clocks
  • Input/Output clock frequency up to 200MHz
  • Non-inverting output clock
  • Ideal for networking clocks
  • Operating voltages: 1.8V to 3.3V
  • Advanced, low-power CMOS process
  • Extended temperature range: -40 °C to +105 °C

ドキュメント

= ピックアップ
分類 タイトル 日時
データシート
524S Datasheet
PDF 267 KB
アプリケーションノート
Termination Options for High-Speed LVCMOS Driver Clock Drivers
PDF 187 KB
概要
Clock Distribution Overview
PDF 217 KB
製品変更通知
PCN# : A1905-02 Adding Carsem, Malaysia as Alternate Assembly Location & Change Material Sets
PDF 268 KB
製品変更通知
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly
PDF 611 KB
製品変更通知
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly
PDF 611 KB
アプリケーションノート
AN-842 Thermal Considerations in Package Design and Selection
PDF 495 KB
アプリケーションノート
AN-840 Jitter Specifications for Timing Signals
PDF 442 KB
アプリケーションノート
AN-815 Understanding Jitter Units
PDF 565 KB
9件

設計・開発

ECADモデル

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ECADモデルを調べる
Diagram of ECAD Models

製品選択

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    Moisture Sensitivity Level (MSL)
    Price (USD) | 1ku
    ご購入 / サンプル
    型名
    524SCMGI
    circleアクティブ
    memory
    view_in_ar
    サンプル入手可能
    今すぐ購入する
    		COL 8 I Yes Cut Tape 1 1.697 サンプルを入手,
    524SCMGI8
    circleアクティブ
    memory
    view_in_ar
    今すぐ購入する
    		COL 8 I Yes Reel 1 1.677
    524SDCGI
    circleアクティブ
    memory
    view_in_ar
    サンプル入手可能
    今すぐ購入する
    		SOIC 8 I Yes Tube 1 1.801 サンプルを入手,
    524SDCGI8
    circleアクティブ
    memory
    view_in_ar
    今すぐ購入する
    		SOIC 8 I Yes Reel 1
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    ビデオ&トレーニング

    Low-jitter LVCMOS Fanout Clock Buffers by IDT

    This video overviews the LVCMOS Fanout Buffers, showcasing their best-in-class performance with extremely low phase jitter, minimal output skew, and low power consumption, along with other competitive features.

    Video List
    Low-jitter LVCMOS Fanout Clock Buffers by IDT