概要

The 854S01I is a high performance 2:1 Differential-to-LVDS Multiplexer. The 854S01I can also perform differential translation because the differential inputs accept LVPECL or LVDS levels. The 854S01I is packaged in a small 3mm x 3mm 16 VFQFN package, making it ideal for use on space constrained boards.

854S01I - Block Diagram
854S01I - Pinout
854S01I - Block Diagram
854S01I - Pinout
  • 2:1 LVDS MUX
  • One LVDS output pair
  • Two differential clock inputs can accept: LVPECL or LVDS
  • Maximum input/output frequency: 2.5GHz
  • Translates LVCMOS/LVTTL input signals to LVDS levels by using a resistor bias network on nPCLK0, nPCLK1
  • RMS additive phase jitter: 0.06ps (typical)
  • Propagation delay: 600ps (maximum)
  • Part-to-part skew: 350ps (maximum)
  • Full 3.3V supply mode
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

ドキュメント

設計・開発

ECADモデル

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ECADモデルを調べる
Diagram of ECAD Models

製品選択

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    Moisture Sensitivity Level (MSL)
    Price (USD) | 1ku
    ご購入 / サンプル
    型名
    854S01AKILF
    circleアクティブ
    memory
    view_in_ar
    サンプル入手可能
    今すぐ購入する
    		VFQFPN 16 I Yes Tray 3 8.37 サンプルを入手,
    854S01AKILFT
    circleアクティブ
    memory
    view_in_ar
    今すぐ購入する
    		VFQFPN 16 I Yes Reel 3
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