概要
説明
IDT’s JEDEC-compliant 4RCD0229K is a Gen 2 DDR4 registered clock driver (RDC) for Enterprise Class Server RDIMMs, LRDIMMs and UDIMMs operating with a 1.2V Vdd supply. It features a 32-bit 1:2 register command, address buffer with parity designed for 1.2V VDD operation.
特長
- JEDEC Compliant RCD
- DDR4-1600/1866/2133/2400/2667
- Optimized for JEDEC DDR4 2667 MT/s RDIMM, LRDIMM and UDIMM
- Designed to be used with IDT 4DB0226KB (DDR4 DB) and IDT TSE2004GB2 (DDR4 Temperature Sensor)
- Supports CKE Power Down operation modes
- Support Quad Chip Select Operation
- Direct Dual CS Mode
- Direct QuadCS Mode
- Encoded QuadCS Mode
- Pinout optimized DDR4 RDIMM, LRDIMM and UDIMM PCB layout
- Provides access to internal control words for configuring the device features and adapting in different RDIMM and system applications
- Available in 253-ball Dual-Pitch (0.50mm/0.65mm), 15 x 20 Grid , Rectangular Ball Grid Array Package
製品比較
アプリケーション
ドキュメント
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| 分類 | タイトル | 日時 |
| データシート－簡略版 | PDF 123 KB | |
| 製品変更通知 | PDF 493 KB | |
| 製品変更通知 | PDF 208 KB | |
| 概要 | PDF 515 KB | |
| 製品変更通知 | PDF 23 KB | |
| 製品変更通知 | PDF 37 KB | |
| ホワイトペーパー | PDF 1.08 MB | |
| ホワイトペーパー | PDF 5.22 MB | |
8件
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設計・開発
モデル
ECADモデル
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| ATG253 | FCCSP | 253 | C | Yes | Tray | 3 | 9.023 | サンプルを入手, |
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ビデオ&トレーニング
A white paper authored by IDT (acquired by Renesas) and Micron details research into memory and bandwidth for today's high-performance servers. LRDIMMS and RDIMMS traditionally have been seen as complementary, with the former targeting applications requiring deeper memory and the latter for applications requiring higher bandwidth.
The introduction of 8-gigabit DRAMS has resulted in a growing number of Internet applications benefiting from both deeper memories and higher bandwidth. This paper shows how 32 GB 2RX4 LRDIMMs transcend similar RDIMMs to meet the needs of today’s data center enterprise servers, by providing an optimal combination of deeper memory and higher data bandwidth, even at mainstream module densities.
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