Processing table
PLP |
Function |
Input Voltage Range (V) |
Input Voltage (Max) (V) |
VBIAS (Max) (V) |
IQ |
ISOURCE (Max) (mA) |
ISINK (Max) (mA) |
Internal Buck Regulator |
Gate Drive (V) |
Internal Auxiliary Power |
Adaptive Dead Time |
VOUT Slew-rate Control |
Charge Pump |
Intern Gain Amplifiers |
Internal Sample & Hold |
Input Control |
Input Logic Level |
Advanced Fault Protection |
Qualification Level |
Lead Count (#) |
Pkg. Type |
Simulation Model Available |
Price (USD) | 1ku |
|
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
型名 | ||||||||||||||||||||||||
80V/0.3A Peak Three Phase High Side Driver | N/A | Three Phase High Side Driver | 7 - 80 | 95 | 15 | 100 µA | 300 | 300 | No | 15 | No | No | No | いいえ | No | No | HI | 3.3V/TTL | はい | Standard | 16 | SOICN | 3.046 | |
80V, 500mA, 3相MOSFETドライバ | N/A | 3-Phase MOSFET Driver | 7 - 80 | 95 | 15 | 40 µA | 500 | 1100 | No | 15 | No | No | No | はい | No | No | HI/LI | 3.3V/TTL | はい | Standard | 24 | PDIP, SOICW | 3.387 | |
80V, 500mA, 3-Phase MOSFET Driver | 2033 12月 | 3-Phase MOSFET Driver | 7 - 80 | 95 | 15 | 90 µA | 500 | 1100 | No | 15 | No | No | No | いいえ | No | No | HI/LI | 3.3V/TTL | はい | Standard | 24 | SOICW |
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