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概要

説明

The ISL22326WMVEP integrates two digitally controlled potentiometers (XDCP™) and non-volatile memory on a monolithic CMOS integrated circuit. The digitally controlled potentiometers are implemented with a combination of resistor elements and CMOS switches. The position of the wipers is controlled by the user through the I2C bus interface. Each potentiometer has an associated volatile wiper register (WR) and a non-volatile initial value register (IVR) that can be directly written to and read by the user. The contents of the WR control the position of the wiper. At power-up, the device recalls the contents of the two DCP's IVR to the corresponding WRs. The DCPs can be used as three-terminal potentiometers or as two-terminal variable resistors in a wide variety of applications including control, parameter adjustments, and signal processing. Device Information The specifications for an enhanced product (EP) device are defined in a vendor item drawing (VID), which is controlled by the Defense Supply Center in Columbus (DSCC). Hot links to the applicable VID and other supporting application information are provided on our website.

特長

  • Specifications per DSCC VID V62/08604-01XE
  • Full Mil-Temp Electrical Performance from -55 °C to +125 °C
  • Controlled Baseline with One Wafer Fabrication Site and One Assembly/Test Site
  • Full Homogeneous Lot Processing in Wafer Fab
  • No Combination of Wafer Fabrication Lots in Assembly
  • Full Traceability Through Assembly and Test by Date/Trace Code Assignment
  • Enhanced Process Change Notification
  • Enhanced Obsolescence Management
  • Eliminates Need for Up-Screening a COTS Component
  • Two Potentiometers in One Package
  • 128 Resistor Taps
  • I2C Serial Interface
  • Three Address Pins, Up To Eight Devices/Bus
  • Non-volatile Storage of Wiper Position
  • Wiper Resistance: 70Ω Typical at 3.3V
  • Shutdown Mode
  • Shutdown Current 5µA Max
  • Power Supply: 2.7V to 5.5V
  • 10kΩ Total Resistance
  • High Reliability
  • Endurance: 1,000,000 Data Changes Per Bit Per Register
  • Register Data Retention:
  • 10 years at T ≤ +125 °C
  • 15 years at T ≤ +90 °C
  • 50 years at T ≤ +55 °C
  • 14 Ld TSSOP

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