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クロックドライバのプルアップおよびプルダウンインピーダンス終端がタイミング波形に及ぼす影響について

2021-12-10

This video describes a case where a clock waveform exhibits overshoot, undershoot, ringing, or stepping, but only on the top or bottom side of the waveform. Unlike cases where the source impedance series resistor can be adjusted to match the transmission line impedance, issues on only one half of the waveform indicate that the pull-up or pull-down impedances of the clock driver are not perfectly matched to the transmission line impedance. If this occurs, users should contact their silicon manufacturer for advice.

Presented by Ron Wade, timing expert at IDT. For more information about IDT's leading portfolio of clock and timing ICs, visit www.idt.com/products/clocks-timing.